From 93b4ed91f6b1027c370da9bdd6d86664dcda671b Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 18 Apr 2012 21:13:33 +0300 Subject: Intel e7505: build as separate object file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No longer include northbridge files directly in the source for mainboard romstage.c and fix includes. Also make required adjustments to function declarations. Change-Id: Iafdcc0766ed44c64cc628e5935eef2c6372f5f22 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/906 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/aopen/dxplplusu/romstage.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) (limited to 'src/mainboard/aopen/dxplplusu') diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c index ee900e9e12..1b3e785017 100644 --- a/src/mainboard/aopen/dxplplusu/romstage.c +++ b/src/mainboard/aopen/dxplplusu/romstage.c @@ -20,33 +20,28 @@ #include #include #include -#include #include -#include #include #include -#include #include #include -#include #include "southbridge/intel/i82801dx/i82801dx.h" #include "southbridge/intel/i82801dx/early_smbus.c" #include "southbridge/intel/i82801dx/reset.c" #include "northbridge/intel/e7505/raminit.h" -#include "northbridge/intel/e7505/debug.c" + +#include #include "superio/smsc/lpc47m10x/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1) -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -#include "northbridge/intel/e7505/raminit.c" - void main(unsigned long bist) { static const struct mem_controller memctrl[] = { @@ -66,7 +61,7 @@ void main(unsigned long bist) report_bist_failure(bist); // If this is a warm boot, some initialization can be skipped - if (!bios_reset_detected()) { + if (!e7505_mch_is_ready()) { enable_smbus(); /* The real MCH initialisation. */ -- cgit v1.2.3