From 3aff1a32087137169fb4165eb2dd11655de27f45 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 11 Apr 2012 12:19:03 +0300 Subject: Convert AOpen DXPL Plus mainboard to CAR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested on real hardware, mainboard with dual Xeon P4 HT CPUs requires cache-as-ram init code with AP SIPI protocol. Also enable 2nd CPU and PATA and clean-up Kconfig and ACPI. Change-Id: I415482f3af22df79d82492c49aed83549f29aa56 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/886 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/aopen/dxplplusu/acpi/i82801db.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/aopen/dxplplusu/acpi/i82801db.asl') diff --git a/src/mainboard/aopen/dxplplusu/acpi/i82801db.asl b/src/mainboard/aopen/dxplplusu/acpi/i82801db.asl index bb8c3218c3..a1a23f2470 100644 --- a/src/mainboard/aopen/dxplplusu/acpi/i82801db.asl +++ b/src/mainboard/aopen/dxplplusu/acpi/i82801db.asl @@ -96,7 +96,7 @@ Device (ICH0) Name (MSBF, ResourceTemplate () { /* IOAPIC 0 */ - Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000,) + Memory32Fixed (ReadWrite, IO_APIC_ADDR, 0x00001000,) IO (Decode16, 0x0, 0x0, 0x80, 0x0, PMIO) IO (Decode16, 0x0, 0x0, 0x40, 0x0, GPIO) -- cgit v1.2.3