From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/amd/bettong/BiosCallOuts.c | 6 +++--- src/mainboard/amd/bettong/romstage.c | 2 +- src/mainboard/amd/bimini_fam10/get_bus_conf.c | 2 +- src/mainboard/amd/bimini_fam10/romstage.c | 4 ++-- src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c | 6 +++--- src/mainboard/amd/lamar/BiosCallOuts.c | 4 ++-- src/mainboard/amd/lamar/OemCustomize.c | 4 ++-- src/mainboard/amd/mahogany_fam10/get_bus_conf.c | 2 +- src/mainboard/amd/mahogany_fam10/romstage.c | 4 ++-- src/mainboard/amd/olivehill/BiosCallOuts.c | 2 +- src/mainboard/amd/olivehill/OemCustomize.c | 2 +- src/mainboard/amd/olivehillplus/BiosCallOuts.c | 6 +++--- src/mainboard/amd/parmer/BiosCallOuts.c | 4 ++-- src/mainboard/amd/parmer/OemCustomize.c | 2 +- src/mainboard/amd/parmer/buildOpts.c | 2 +- src/mainboard/amd/serengeti_cheetah_fam10/mptable.c | 2 +- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 4 ++-- src/mainboard/amd/thatcher/BiosCallOuts.c | 4 ++-- src/mainboard/amd/thatcher/buildOpts.c | 2 +- src/mainboard/amd/tilapia_fam10/get_bus_conf.c | 2 +- src/mainboard/amd/tilapia_fam10/romstage.c | 4 ++-- src/mainboard/amd/torpedo/Oem.h | 2 +- src/mainboard/amd/torpedo/platform_cfg.h | 4 ++-- 23 files changed, 38 insertions(+), 38 deletions(-) (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c index c805015088..94897c849d 100644 --- a/src/mainboard/amd/bettong/BiosCallOuts.c +++ b/src/mainboard/amd/bettong/BiosCallOuts.c @@ -83,18 +83,18 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchParams_reset->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchParams_reset->FchReset.Xhci1Enable = FALSE; FchParams_reset->EarlyOemGpioTable = oem_bettong_gpio; } else if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) + if (CONFIG(HUDSON_IMC_FWM)) oem_fan_control(FchParams_env); /* XHCI configuration */ - if (IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE)) + if (CONFIG(HUDSON_XHCI_ENABLE)) FchParams_env->Usb.Xhci0Enable = TRUE; else FchParams_env->Usb.Xhci0Enable = FALSE; diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c index f250168fdd..5201fa3a94 100644 --- a/src/mainboard/amd/bettong/romstage.c +++ b/src/mainboard/amd/bettong/romstage.c @@ -34,7 +34,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); -#if IS_ENABLED(CONFIG_HUDSON_UART) +#if CONFIG(HUDSON_UART) configure_hudson_uart(); #endif post_code(0x31); diff --git a/src/mainboard/amd/bimini_fam10/get_bus_conf.c b/src/mainboard/amd/bimini_fam10/get_bus_conf.c index 799455f620..df0a564b76 100644 --- a/src/mainboard/amd/bimini_fam10/get_bus_conf.c +++ b/src/mainboard/amd/bimini_fam10/get_bus_conf.c @@ -36,7 +36,7 @@ void get_bus_conf(void) pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ - if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) + if (CONFIG(LOGICAL_CPUS)) apicid_base = get_apicid_base(1); else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 765bb2411e..e134ccdcc0 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -131,7 +131,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) +#if CONFIG(LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs780_early_setup(); sb800_early_setup(); -#if IS_ENABLED(CONFIG_SET_FIDVID) +#if CONFIG(SET_FIDVID) msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); diff --git a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c index 318d4a93c6..83db64c60d 100644 --- a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c +++ b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c @@ -135,7 +135,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) LibAmdMemCopy ((VOID *)(FchParams->Hwm.HwmFanControl), &oem_factl, (sizeof (FCH_HWM_FAN_CTR) * 5), FchParams->StdHeader); /* Enable IMC fan control. the recommended way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ FchParams->Hwm.HwMonitorEnable = TRUE; FchParams->Hwm.HwmFchtsiAutoPoll = FALSE; /* 0 disable, 1 enable TSI Auto Polling */ @@ -272,7 +272,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) FchParams->LegacyFree = CONFIG_HUDSON_LEGACY_FREE; FchParams->FchReset.SataEnable = hudson_sata_enable(); FchParams->FchReset.IdeEnable = hudson_ide_enable(); - FchParams->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchParams->FchReset.Xhci1Enable = FALSE; } else if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams = (FCH_DATA_BLOCK *)FchData; @@ -293,7 +293,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) oem_fan_control(FchParams); /* XHCI configuration */ - FchParams->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchParams->Usb.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchParams->Usb.Xhci1Enable = FALSE; /* sata configuration */ diff --git a/src/mainboard/amd/lamar/BiosCallOuts.c b/src/mainboard/amd/lamar/BiosCallOuts.c index 89d66a5010..6a4da6275f 100644 --- a/src/mainboard/amd/lamar/BiosCallOuts.c +++ b/src/mainboard/amd/lamar/BiosCallOuts.c @@ -150,7 +150,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) LibAmdMemCopy ((VOID *)(FchParams->Hwm.HwmFanControl), &oem_factl, (sizeof(FCH_HWM_FAN_CTR) * 5), FchParams->StdHeader); /* Enable IMC fan control. the recommended way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { imc_reg_init(); /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ @@ -287,7 +287,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - FchParams->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); + FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); /* Turn on FCH GPP slots */ FchParams->FchReset.GppEnable = TRUE; diff --git a/src/mainboard/amd/lamar/OemCustomize.c b/src/mainboard/amd/lamar/OemCustomize.c index 8cb777625c..2cd013b59a 100644 --- a/src/mainboard/amd/lamar/OemCustomize.c +++ b/src/mainboard/amd/lamar/OemCustomize.c @@ -58,7 +58,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = { { /* PCIe x4 Connector J120, GPP[7:4], Lanes [15:12] */ DESCRIPTOR_TERMINATE_LIST, PCIE_ENGINE_DATA_INITIALIZER( - IS_ENABLED(CONFIG_ENABLE_DP3_DAUGHTER_CARD_IN_J120) ? PcieUnusedEngine : PciePortEngine, + CONFIG(ENABLE_DP3_DAUGHTER_CARD_IN_J120) ? PcieUnusedEngine : PciePortEngine, 12, 15 ), PCIE_PORT_DATA_INITIALIZER_V2( @@ -78,7 +78,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList[] = { { /* DP3 */ 0, PCIE_ENGINE_DATA_INITIALIZER( - IS_ENABLED(CONFIG_ENABLE_DP3_DAUGHTER_CARD_IN_J120) ? PcieDdiEngine : PcieUnusedEngine, + CONFIG(ENABLE_DP3_DAUGHTER_CARD_IN_J120) ? PcieDdiEngine : PcieUnusedEngine, 12, 15 ), PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux4, Hdp4) diff --git a/src/mainboard/amd/mahogany_fam10/get_bus_conf.c b/src/mainboard/amd/mahogany_fam10/get_bus_conf.c index ade9c79e00..cbf436bf6f 100644 --- a/src/mainboard/amd/mahogany_fam10/get_bus_conf.c +++ b/src/mainboard/amd/mahogany_fam10/get_bus_conf.c @@ -37,7 +37,7 @@ void get_bus_conf(void) pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ - if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) + if (CONFIG(LOGICAL_CPUS)) apicid_base = get_apicid_base(1); else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 67b90a41fd..44f6b9402d 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -132,7 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); - #if IS_ENABLED(CONFIG_LOGICAL_CPUS) + #if CONFIG(LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -146,7 +146,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs780_early_setup(); sb7xx_51xx_early_setup(); - #if IS_ENABLED(CONFIG_SET_FIDVID) + #if CONFIG(SET_FIDVID) msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); diff --git a/src/mainboard/amd/olivehill/BiosCallOuts.c b/src/mainboard/amd/olivehill/BiosCallOuts.c index 215309b3c5..fa9f7c780f 100644 --- a/src/mainboard/amd/olivehill/BiosCallOuts.c +++ b/src/mainboard/amd/olivehill/BiosCallOuts.c @@ -102,7 +102,7 @@ static const CODEC_TBL_LIST OlivehillCodecTableList[] = static void oem_fan_control(FCH_DATA_BLOCK *FchParams) { /* Enable IMC fan control. the recommand way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { imc_reg_init(); /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ diff --git a/src/mainboard/amd/olivehill/OemCustomize.c b/src/mainboard/amd/olivehill/OemCustomize.c index 45dca01829..df13fa502f 100644 --- a/src/mainboard/amd/olivehill/OemCustomize.c +++ b/src/mainboard/amd/olivehill/OemCustomize.c @@ -101,7 +101,7 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) { FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; - FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchReset->Xhci1Enable = FALSE; } diff --git a/src/mainboard/amd/olivehillplus/BiosCallOuts.c b/src/mainboard/amd/olivehillplus/BiosCallOuts.c index 3eea990349..2f22f6cdfd 100644 --- a/src/mainboard/amd/olivehillplus/BiosCallOuts.c +++ b/src/mainboard/amd/olivehillplus/BiosCallOuts.c @@ -118,7 +118,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) LibAmdMemCopy ((VOID *)(FchParams->Hwm.HwmFanControl), &oem_factl, (sizeof(FCH_HWM_FAN_CTR) * 5), FchParams->StdHeader); /* Enable IMC fan control. the recommended way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ FchParams->Hwm.HwMonitorEnable = TRUE; FchParams->Hwm.HwmFchtsiAutoPoll = FALSE; /* 0 disable, 1 enable TSI Auto Polling */ @@ -256,7 +256,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) FchParams->LegacyFree = CONFIG_HUDSON_LEGACY_FREE; FchParams->FchReset.SataEnable = hudson_sata_enable(); FchParams->FchReset.IdeEnable = hudson_ide_enable(); - FchParams->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchParams->FchReset.Xhci1Enable = FALSE; } else if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams = (FCH_DATA_BLOCK *)FchData; @@ -270,7 +270,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) oem_fan_control(FchParams); /* XHCI configuration */ - FchParams->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchParams->Usb.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchParams->Usb.Xhci1Enable = FALSE; /* sata configuration */ diff --git a/src/mainboard/amd/parmer/BiosCallOuts.c b/src/mainboard/amd/parmer/BiosCallOuts.c index 95b8e41840..506a605905 100644 --- a/src/mainboard/amd/parmer/BiosCallOuts.c +++ b/src/mainboard/amd/parmer/BiosCallOuts.c @@ -102,7 +102,7 @@ static const CODEC_TBL_LIST CodecTableList[] = static void oem_fan_control(FCH_DATA_BLOCK *FchParams) { /* Enable IMC fan control. the recommand way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { imc_reg_init(); /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ @@ -170,7 +170,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { - FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); + FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); } void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) diff --git a/src/mainboard/amd/parmer/OemCustomize.c b/src/mainboard/amd/parmer/OemCustomize.c index 8375073b06..2eed8b21d3 100644 --- a/src/mainboard/amd/parmer/OemCustomize.c +++ b/src/mainboard/amd/parmer/OemCustomize.c @@ -166,7 +166,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList[] = { void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) { FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; - FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); FchReset->Xhci1Enable = FALSE; } diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c index 7edc330c80..7ff6caa828 100644 --- a/src/mainboard/amd/parmer/buildOpts.c +++ b/src/mainboard/amd/parmer/buildOpts.c @@ -152,7 +152,7 @@ #define BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON 3 #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3 -#if IS_ENABLED(CONFIG_GFXUMA) +#if CONFIG(GFXUMA) #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c index 0d4b344fe0..61aa9067fc 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c @@ -18,7 +18,7 @@ #include #include #include -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) +#if CONFIG(LOGICAL_CPUS) #include #endif #include diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index d19ebdadb3..e7421ce2c6 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -235,7 +235,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); - #if IS_ENABLED(CONFIG_LOGICAL_CPUS) + #if CONFIG(LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -245,7 +245,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); - #if IS_ENABLED(CONFIG_SET_FIDVID) + #if CONFIG(SET_FIDVID) msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c index 4fc97d0e3a..249f301770 100644 --- a/src/mainboard/amd/thatcher/BiosCallOuts.c +++ b/src/mainboard/amd/thatcher/BiosCallOuts.c @@ -102,7 +102,7 @@ static const CODEC_TBL_LIST CodecTableList[] = static void oem_fan_control(FCH_DATA_BLOCK *FchParams) { /* Enable IMC fan control. the recommand way */ - if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) { + if (CONFIG(HUDSON_IMC_FWM)) { imc_reg_init(); /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ @@ -171,7 +171,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { - FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); + FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); } void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c index 9e383b4817..96847a74fb 100644 --- a/src/mainboard/amd/thatcher/buildOpts.c +++ b/src/mainboard/amd/thatcher/buildOpts.c @@ -152,7 +152,7 @@ #define BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON 3 #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3 -#if IS_ENABLED(CONFIG_GFXUMA) +#if CONFIG(GFXUMA) #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ diff --git a/src/mainboard/amd/tilapia_fam10/get_bus_conf.c b/src/mainboard/amd/tilapia_fam10/get_bus_conf.c index 0f30f165cf..6bdf94a39d 100644 --- a/src/mainboard/amd/tilapia_fam10/get_bus_conf.c +++ b/src/mainboard/amd/tilapia_fam10/get_bus_conf.c @@ -46,7 +46,7 @@ void get_bus_conf(void) pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ - if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) + if (CONFIG(LOGICAL_CPUS)) apicid_base = get_apicid_base(1); else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index a90bac6ef7..5b66f47f53 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -130,7 +130,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) +#if CONFIG(LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -144,7 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs780_early_setup(); sb7xx_51xx_early_setup(); -#if IS_ENABLED(CONFIG_SET_FIDVID) +#if CONFIG(SET_FIDVID) msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); diff --git a/src/mainboard/amd/torpedo/Oem.h b/src/mainboard/amd/torpedo/Oem.h index f8f9d80502..07567aaed6 100644 --- a/src/mainboard/amd/torpedo/Oem.h +++ b/src/mainboard/amd/torpedo/Oem.h @@ -16,7 +16,7 @@ #define BIOS_SIZE 0x04 //04 - 1MB #endif #define LEGACY_FREE 0x00 -#if !IS_ENABLED(CONFIG_ONBOARD_USB30) +#if !CONFIG(ONBOARD_USB30) #define XHCI_SUPPORT 0x01 #endif diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h index 622fffec39..557abecb43 100644 --- a/src/mainboard/amd/torpedo/platform_cfg.h +++ b/src/mainboard/amd/torpedo/platform_cfg.h @@ -294,7 +294,7 @@ #define INCHIP_USB_CINFIG 0x7F #define INCHIP_USB_OHCI1_CINFIG 0x01 #define INCHIP_USB_OHCI2_CINFIG 0x01 -#if IS_ENABLED(CONFIG_ONBOARD_USB30) +#if CONFIG(ONBOARD_USB30) #define INCHIP_USB_OHCI3_CINFIG 0x00 #else #define INCHIP_USB_OHCI3_CINFIG 0x01 @@ -962,7 +962,7 @@ * @li 0 - Disable * @li 1 - Enable */ -#if IS_ENABLED(CONFIG_ONBOARD_USB30) +#if CONFIG(ONBOARD_USB30) #define SB_XHCI_SWITCH 0 #else #define SB_XHCI_SWITCH 1 -- cgit v1.2.3