From bde6d309dfafe58732ec46314a2d4c08974b62d4 Mon Sep 17 00:00:00 2001 From: Kevin Paul Herbert Date: Wed, 24 Dec 2014 18:43:20 -0800 Subject: x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins) --- src/mainboard/amd/bimini_fam10/mptable.c | 2 +- src/mainboard/amd/dbm690t/mptable.c | 3 ++- src/mainboard/amd/dinar/mptable.c | 6 +++--- src/mainboard/amd/inagua/mptable.c | 6 +++--- src/mainboard/amd/mahogany/mptable.c | 3 ++- src/mainboard/amd/mahogany_fam10/mptable.c | 3 ++- src/mainboard/amd/olivehill/mptable.c | 8 ++++---- src/mainboard/amd/olivehillplus/mptable.c | 8 ++++---- src/mainboard/amd/parmer/mptable.c | 6 +++--- src/mainboard/amd/persimmon/mptable.c | 6 +++--- src/mainboard/amd/pistachio/mptable.c | 3 ++- src/mainboard/amd/serengeti_cheetah/mptable.c | 14 +++++++++----- src/mainboard/amd/serengeti_cheetah_fam10/mptable.c | 14 +++++++++----- src/mainboard/amd/south_station/mptable.c | 6 +++--- src/mainboard/amd/thatcher/mptable.c | 6 +++--- src/mainboard/amd/tilapia_fam10/mptable.c | 3 ++- src/mainboard/amd/torpedo/mptable.c | 6 +++--- src/mainboard/amd/union_station/mptable.c | 6 +++--- 18 files changed, 61 insertions(+), 48 deletions(-) (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/bimini_fam10/mptable.c b/src/mainboard/amd/bimini_fam10/mptable.c index 1d0f5bf031..ea3cc720ca 100644 --- a/src/mainboard/amd/bimini_fam10/mptable.c +++ b/src/mainboard/amd/bimini_fam10/mptable.c @@ -66,7 +66,7 @@ static void *smp_write_config_table(void *v) dword |= (pm_ioread(0x35) & 0xFF) << 8; dword |= (pm_ioread(0x36) & 0xFF) << 16; dword |= (pm_ioread(0x37) & 0xFF) << 24; - smp_write_ioapic(mc, apicid_sb800, 0x11, dword); + smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword); for (byte = 0x0; byte < sizeof(intr_data); byte ++) { outb(byte | 0x80, 0xC00); diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c index 09d137a174..511db716fb 100644 --- a/src/mainboard/amd/dbm690t/mptable.c +++ b/src/mainboard/amd/dbm690t/mptable.c @@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v) PCI_DEVFN(sbdn_sb600 + 0x14, 0)); if (dev) { dword = pci_read_config32(dev, 0x74) & 0xfffffff0; - smp_write_ioapic(mc, apicid_sb600, 0x11, dword); + smp_write_ioapic(mc, apicid_sb600, + 0x11,(void *) dword); /* Initialize interrupt mapping */ /* aza */ diff --git a/src/mainboard/amd/dinar/mptable.c b/src/mainboard/amd/dinar/mptable.c index 4e481f51b6..197d1c3332 100644 --- a/src/mainboard/amd/dinar/mptable.c +++ b/src/mainboard/amd/dinar/mptable.c @@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v) u32 apicid_sb700; u32 apicid_rd890; device_t dev; - u32 dword; + u8 *dword; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); mptable_init(mc, LOCAL_APIC_ADDR); @@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v) dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); if (dev) { /* Set sb700 IOAPIC ID */ - dword = pci_read_config32(dev, 0x74) & 0xfffffff0; + dword = (u8 *)(pci_read_config32(dev, 0x74) & 0xfffffff0); smp_write_ioapic(mc, apicid_sb700, 0x20, dword); /* @@ -80,7 +80,7 @@ static void *smp_write_config_table(void *v) dev = dev_find_slot(0, PCI_DEVFN(0, 0)); if (dev) { pci_write_config32(dev, 0xF8, 0x1); - dword = pci_read_config32(dev, 0xFC) & 0xfffffff0; + dword = (u8 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0); smp_write_ioapic(mc, apicid_rd890, 0x20, dword); } diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c index 7686bd2ff7..44eda7118b 100644 --- a/src/mainboard/amd/inagua/mptable.c +++ b/src/mainboard/amd/inagua/mptable.c @@ -52,8 +52,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -65,7 +65,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); u8 byte; diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c index bd31846cf6..4c1946c314 100644 --- a/src/mainboard/amd/mahogany/mptable.c +++ b/src/mainboard/amd/mahogany/mptable.c @@ -60,7 +60,8 @@ static void *smp_write_config_table(void *v) PCI_DEVFN(sbdn_sb700 + 0x14, 0)); if (dev) { dword = pci_read_config32(dev, 0x74) & 0xfffffff0; - smp_write_ioapic(mc, apicid_sb700, 0x11, dword); + smp_write_ioapic(mc, apicid_sb700, + 0x11,(void *) dword); /* Initialize interrupt mapping */ /* aza */ diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c index 11426c2343..678610393c 100644 --- a/src/mainboard/amd/mahogany_fam10/mptable.c +++ b/src/mainboard/amd/mahogany_fam10/mptable.c @@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v) PCI_DEVFN(sbdn_sb700 + 0x14, 0)); if (dev) { dword = pci_read_config32(dev, 0x74) & 0xfffffff0; - smp_write_ioapic(mc, apicid_sb700, 0x11, dword); + smp_write_ioapic(mc, apicid_sb700, + 0x11,(void *) dword); /* Initialize interrupt mapping */ /* aza */ diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c index db4a3ffa8e..db3ffb16f2 100644 --- a/src/mainboard/amd/olivehill/mptable.c +++ b/src/mainboard/amd/olivehill/mptable.c @@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -92,9 +92,9 @@ static void *smp_write_config_table(void *v) my_smp_write_bus(mc, bus_isa, "ISA "); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); - smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000); + smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000); /* PIC IRQ routine */ for (byte = 0x0; byte < sizeof(picr_data); byte ++) { outb(byte, 0xC00); diff --git a/src/mainboard/amd/olivehillplus/mptable.c b/src/mainboard/amd/olivehillplus/mptable.c index d49c998332..bc15d81764 100644 --- a/src/mainboard/amd/olivehillplus/mptable.c +++ b/src/mainboard/amd/olivehillplus/mptable.c @@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -92,9 +92,9 @@ static void *smp_write_config_table(void *v) my_smp_write_bus(mc, bus_isa, "ISA "); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); - smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000); + smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000); /* PIC IRQ routine */ for (byte = 0x0; byte < sizeof(picr_data); byte ++) { outb(byte, 0xC00); diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c index 05da01a4d9..cb0bbba2c9 100644 --- a/src/mainboard/amd/parmer/mptable.c +++ b/src/mainboard/amd/parmer/mptable.c @@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -92,7 +92,7 @@ static void *smp_write_config_table(void *v) my_smp_write_bus(mc, bus_isa, "ISA "); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); /* PIC IRQ routine */ for (byte = 0x0; byte < sizeof(picr_data); byte ++) { diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c index 1227d8948f..0cf57bdcce 100644 --- a/src/mainboard/amd/persimmon/mptable.c +++ b/src/mainboard/amd/persimmon/mptable.c @@ -41,8 +41,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); /* Intialize the MP_Table */ mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -67,7 +67,7 @@ static void *smp_write_config_table(void *v) * Type 2: I/O APICs: * APIC ID, Version, APIC Flags:EN, Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); /* * Type 3: I/O Interrupt Table Entries: diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c index 09d137a174..511db716fb 100644 --- a/src/mainboard/amd/pistachio/mptable.c +++ b/src/mainboard/amd/pistachio/mptable.c @@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v) PCI_DEVFN(sbdn_sb600 + 0x14, 0)); if (dev) { dword = pci_read_config32(dev, 0x74) & 0xfffffff0; - smp_write_ioapic(mc, apicid_sb600, 0x11, dword); + smp_write_ioapic(mc, apicid_sb600, + 0x11,(void *) dword); /* Initialize interrupt mapping */ /* aza */ diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index 866875dc63..56df3fa4d6 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -29,7 +29,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /*I/O APICs: APIC ID Version State Address*/ - smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111 + smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111 { device_t dev; struct resource *res; @@ -37,14 +37,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_1, 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_2, 0x11, + res2mmio(res, 0, 0)); } } @@ -60,14 +62,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, + res2mmio(res, 0, 0)); } } break; diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c index 5335cb8290..56c6fc0350 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c @@ -48,7 +48,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /*I/O APICs: APIC ID Version State Address*/ - smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111 + smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111 { device_t dev; struct resource *res; @@ -56,14 +56,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_1, 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132_2, 0x11, + res2mmio(res, 0, 0)); } } @@ -79,14 +81,16 @@ static void *smp_write_config_table(void *v) if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, + res2mmio(res, 0, 0)); } } dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base); + smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, + res2mmio(res, 0, 0)); } } break; diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c index c2ec4a26df..6b35ce821e 100644 --- a/src/mainboard/amd/south_station/mptable.c +++ b/src/mainboard/amd/south_station/mptable.c @@ -49,8 +49,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); u8 byte; diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c index 8ddd1b6740..f6d5e6e2e2 100644 --- a/src/mainboard/amd/thatcher/mptable.c +++ b/src/mainboard/amd/thatcher/mptable.c @@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -92,7 +92,7 @@ static void *smp_write_config_table(void *v) my_smp_write_bus(mc, bus_isa, "ISA "); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); /* PIC IRQ routine */ for (byte = 0x0; byte < sizeof(picr_data); byte ++) { diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c index 11426c2343..678610393c 100644 --- a/src/mainboard/amd/tilapia_fam10/mptable.c +++ b/src/mainboard/amd/tilapia_fam10/mptable.c @@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v) PCI_DEVFN(sbdn_sb700 + 0x14, 0)); if (dev) { dword = pci_read_config32(dev, 0x74) & 0xfffffff0; - smp_write_ioapic(mc, apicid_sb700, 0x11, dword); + smp_write_ioapic(mc, apicid_sb700, + 0x11,(void *) dword); /* Initialize interrupt mapping */ /* aza */ diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c index 477d97adbf..02206a9d87 100644 --- a/src/mainboard/amd/torpedo/mptable.c +++ b/src/mainboard/amd/torpedo/mptable.c @@ -107,11 +107,11 @@ static void *smp_write_config_table(void *v) /* I/O APICs: APIC ID Version State Address */ - u32 dword; + u8 *dword; u8 byte; - ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword); - dword &= 0xFFFFFFF0; + ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword); + dword = (u8 *)(((uintptr_t) dword) & 0xFFFFFFF0); /* Set IO APIC ID onto IO_APIC_ID */ write32 (dword, 0x00); write32 (dword + 0x10, IO_APIC_ID << 24); diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c index c2ec4a26df..b6e196a8fb 100644 --- a/src/mainboard/amd/union_station/mptable.c +++ b/src/mainboard/amd/union_station/mptable.c @@ -49,8 +49,8 @@ static void *smp_write_config_table(void *v) * have been written so they can be read to get the correct * APIC ID and Version */ - u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF); mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); u8 byte; -- cgit v1.2.3