From bbd60e31becddfae9496b82551945727050fc08d Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 7 Aug 2017 23:05:09 +0300 Subject: soc/amd/stoneyridge ACPI: Sync sleepstates.asl definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sync file with southbridge/amd/common/sleepstates.asl. SSFG was meant to be used as a mask to enable sleepstates _S1 thru _S4. However as a logical instead of bitwise 'and' operation was used, all the states were enabled if only one was marked available. Change-Id: I674953f1a5add74e16ddd84c252e8d21501ffefd Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21092 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/mainboard/amd/gardenia/acpi/mainboard.asl | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/gardenia/acpi/mainboard.asl b/src/mainboard/amd/gardenia/acpi/mainboard.asl index 508daa7234..db5731f088 100644 --- a/src/mainboard/amd/gardenia/acpi/mainboard.asl +++ b/src/mainboard/amd/gardenia/acpi/mainboard.asl @@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ -- cgit v1.2.3