From 04d025cf5015b06f9e4dafc7092cfbd5d24b241e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 3 Jul 2019 06:50:19 +0300 Subject: amdfam10: Declare get_sysinfo() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's forbidden to use dereference CAR_GLOBAL variables directly. The notation fails after CAR teardown for romstage. Change-Id: I6e6285ca0f520608c2a344517fbac943aeb36d87 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/33995 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/amd/bimini_fam10/romstage.c | 3 +-- src/mainboard/amd/mahogany_fam10/romstage.c | 3 +-- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 3 +-- src/mainboard/amd/tilapia_fam10/romstage.c | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index e9d391cb0a..e2142f2791 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -42,7 +42,6 @@ #include "cpu/amd/quadcore/quadcore.c" int spd_read_byte(unsigned int device, unsigned int address); -extern struct sys_info sysinfo_car; int spd_read_byte(u32 device, u32 address) @@ -52,7 +51,7 @@ int spd_read_byte(u32 device, u32 address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = &sysinfo_car; + struct sys_info *sysinfo = get_sysinfo(); static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; u32 bsp_apicid = 0, val; msr_t msr; diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 2376414206..3397d26d96 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -46,7 +46,6 @@ #include "cpu/amd/quadcore/quadcore.c" int spd_read_byte(unsigned int device, unsigned int address); -extern struct sys_info sysinfo_car; int spd_read_byte(u32 device, u32 address) @@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = &sysinfo_car; + struct sys_info *sysinfo = get_sysinfo(); static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; u32 bsp_apicid = 0, val; msr_t msr; diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 1ba65427c2..3871c592d5 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -42,7 +42,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) int spd_read_byte(unsigned int device, unsigned int address); -extern struct sys_info sysinfo_car; static void memreset_setup(void) { @@ -167,7 +166,7 @@ static const u8 spd_addr[] = { void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = &sysinfo_car; + struct sys_info *sysinfo = get_sysinfo(); u32 bsp_apicid = 0, val; msr_t msr; diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 9aa59b285a..702e9db9df 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -44,7 +44,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) int spd_read_byte(unsigned int device, unsigned int address); -extern struct sys_info sysinfo_car; int spd_read_byte(u32 device, u32 address) @@ -55,7 +54,7 @@ int spd_read_byte(u32 device, u32 address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = &sysinfo_car; + struct sys_info *sysinfo = get_sysinfo(); static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; u32 bsp_apicid = 0, val; msr_t msr; -- cgit v1.2.3