From 7ee8e7f12969f3141fd0b1c814c3b648268156b8 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 21 May 2020 15:24:42 +0200 Subject: AGESA f15tn: Factor out default MTRR settings All AGESA f15tn boards use the same MTRR values. Factor them out, while still allowing a board to override them via BLDCFG. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I90c95493de1bb5b8f32c06b9575fef3aa7aca031 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41664 Tested-by: build bot (Jenkins) Reviewed-by: Mike Banon --- src/mainboard/amd/thatcher/buildOpts.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'src/mainboard/amd/thatcher') diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c index a97e8f0952..c4e0fce9a9 100644 --- a/src/mainboard/amd/thatcher/buildOpts.c +++ b/src/mainboard/amd/thatcher/buildOpts.c @@ -194,24 +194,6 @@ // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG FALSE // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG FALSE -CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] = -{ - { AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1E }, - { AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1E }, - { AMD_AP_MTRR_FIX16k_A0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_C0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_C8000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_D0000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_D8000, 0x0000000000000000 }, - { AMD_AP_MTRR_FIX4k_E0000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_E8000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_F0000, 0x1818181818181818 }, - { AMD_AP_MTRR_FIX4k_F8000, 0x1818181818181818 }, - { CPU_LIST_TERMINAL } -}; - -#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList - /* Include the files that instantiate the configuration definitions. */ #include "cpuRegisters.h" #include "cpuFamRegisters.h" -- cgit v1.2.3