From 7fb692bd867b271834be797029a6b4f72e4601bd Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 20 Jan 2013 10:38:58 -0700 Subject: Fam15tn: Move SPD read from mainboards into wrapper Continuing with the mainboard cleanup for F15tn, move the functions to read the SPD from the mainboards for Thatcher and Parmer into the wrapper for the northbridge/amd/agesa/family15tn. Move the SPD address customization for the mainboard into the devicetree.cb file. Unrelated side note - Porting.h has an un-closed #pragma pack(1) that can cause confusing side-effects. AGESA's structures all use this, but coreboot's don't. Be sure to include the coreboot .h files BEFORE Porting.h is included, not after. This fix has been tested. Change-Id: I89cdd225be61f60c6b8e7020e6f8b879983bbd96 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/2190 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones Reviewed-by: Paul Menzel Reviewed-by: Siyuan Wang --- src/mainboard/amd/thatcher/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/amd/thatcher/Makefile.inc') diff --git a/src/mainboard/amd/thatcher/Makefile.inc b/src/mainboard/amd/thatcher/Makefile.inc index de3163d98a..a83297aac1 100644 --- a/src/mainboard/amd/thatcher/Makefile.inc +++ b/src/mainboard/amd/thatcher/Makefile.inc @@ -19,12 +19,10 @@ romstage-y += buildOpts.c romstage-y += agesawrapper.c -romstage-y += dimmSpd.c romstage-y += BiosCallOuts.c romstage-y += PlatformGnbPcie.c ramstage-y += buildOpts.c ramstage-y += agesawrapper.c -ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c -- cgit v1.2.3