From f87855ceab7e735221c1b85ed405a0b47e329125 Mon Sep 17 00:00:00 2001 From: Jens Rottmann Date: Mon, 18 Feb 2013 18:56:48 +0100 Subject: Inagua+children: fix simple copy & paste error in code to reset PCIe slots Looking at AssertSlotReset, the comments and all other case's it's obvious this is a simple copy & paste error where someone just forgot to change one occurrance of the GPIO nr. Also the AMD Inagua schematics show that GPIO02 is what they really meant. Also forward the fix to boards copied from Inagua (AMD South Station, Union Station, Asrock E350M1). Change-Id: I6b9a3d473245fa27604b2f148a730290277a88ed Signed-off-by: Jens Rottmann Reviewed-on: http://review.coreboot.org/2445 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge --- src/mainboard/amd/south_station/BiosCallOuts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/amd/south_station') diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c b/src/mainboard/amd/south_station/BiosCallOuts.c index 3cfd741755..0fc7bee2f6 100644 --- a/src/mainboard/amd/south_station/BiosCallOuts.c +++ b/src/mainboard/amd/south_station/BiosCallOuts.c @@ -602,7 +602,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) Status = AGESA_SUCCESS; break; case DeassertSlotReset: - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); + Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 |= BIT6 ; Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Status = AGESA_SUCCESS; -- cgit v1.2.3