From ea8d4607ce496b48fe5946ec309663261558f634 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Mon, 23 Dec 2013 09:55:33 +0200
Subject: AMD K8 (rev F): Move rev F0/F1 workaround to header
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Place this in header so it works also when raminit_f.c and
raminit_f_dqs.c are not #included in romstage.c build.

The workaround remains to be disabled for all boards.

Change-Id: Iff0271ceb21ee1e28a1a31d6bbdb97e29d76461e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4568
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/mainboard/amd/serengeti_cheetah/romstage.c | 4 ----
 1 file changed, 4 deletions(-)

(limited to 'src/mainboard/amd/serengeti_cheetah')

diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index f8c3aec66b..b103389c63 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -1,7 +1,3 @@
-#if CONFIG_K8_REV_F_SUPPORT
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-#endif
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
-- 
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