From 9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a Mon Sep 17 00:00:00 2001
From: Patrick Georgi <patrick@georgi-clan.de>
Date: Sat, 20 Nov 2010 10:31:00 +0000
Subject: Unify DIMM SPD addressing. For Geode, change the addressing scheme to
 match the rest of the tree (0x50 instead of 0xa0).

abuild tested.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/amd/rumba/romstage.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

(limited to 'src/mainboard/amd/rumba')

diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index f8cd775f02..e08d967471 100644
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -9,15 +9,13 @@
 #include "cpu/x86/msr.h"
 #include <cpu/amd/gx2def.h>
 #include <cpu/amd/geode_post_code.h>
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 
-#define DIMM0 0xA0
-#define DIMM1 0xFF /* DIMM1 is not available/used on this board. */
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
  	if (device != DIMM0)
-- 
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