From aedcc10ad30f3fcc1397035876672d235418393f Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 21 Jul 2014 08:07:19 +0200 Subject: src/mainboard: Remove trailing whitespace Change-Id: I14a9dc99acb5d5365a3d7e99a3964120bb611b05 Signed-off-by: Elyes HAOUAS Reviewed-on: http://review.coreboot.org/6308 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/amd/olivehill/buildOpts.c | 2 +- src/mainboard/amd/olivehill/romstage.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/amd/olivehill') diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c index 98151a29ef..5aa176891a 100644 --- a/src/mainboard/amd/olivehill/buildOpts.c +++ b/src/mainboard/amd/olivehill/buildOpts.c @@ -250,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] = #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList -//#include "KeralaInstall.h" +//#include "KeralaInstall.h" /* Include the files that instantiate the configuration definitions. */ #include "cpuRegisters.h" diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 718a0575d8..326a41ab8c 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -68,8 +68,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Load MPB */ val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); + printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); + printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); /* On Larne, after LpcClkDrvSth is set, it needs some time to be stable, because of the buffer ICS551M */ int i; -- cgit v1.2.3