From 2df118cdf04c72156ca92b940063288968ca7cea Mon Sep 17 00:00:00 2001
From: Marc Jones <marcj303@gmail.com>
Date: Fri, 5 May 2017 16:15:31 -0600
Subject: amd/gardenia: Switch to soc/amd/stoneyridge

Switch Garnenia mainboard to single soc/ directory structure.

Change-Id: I095804d603bcccf324d3244965081a9dccba62ae
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/mainboard/amd/gardenia/mainboard.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/amd/gardenia/mainboard.c')

diff --git a/src/mainboard/amd/gardenia/mainboard.c b/src/mainboard/amd/gardenia/mainboard.c
index acc9b7cfb9..947029620c 100644
--- a/src/mainboard/amd/gardenia/mainboard.c
+++ b/src/mainboard/amd/gardenia/mainboard.c
@@ -17,7 +17,7 @@
 #include <device/device.h>
 #include <arch/acpi.h>
 #include <agesawrapper.h>
-#include <southbridge/amd/common/amd_pci_util.h>
+#include <amd_pci_util.h>
 
 /***********************************************************
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
-- 
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