From 88bc0f1604494de0f87c6954c050e7ef4d1c4457 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 8 Jul 2024 04:29:39 +0200 Subject: skl/kbl mainboards: Move PCIe related settings into their device scope Change-Id: I1ffa87eeee521180f37371e5a0d1f9a1a06091aa Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83373 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks Reviewed-by: Matt DeVillier Reviewed-by: Erik van den Bogaert Reviewed-by: Jonathon Hall --- src/mainboard/51nb/x210/devicetree.cb | 53 ++++++++++++++++++----------------- 1 file changed, 27 insertions(+), 26 deletions(-) (limited to 'src/mainboard/51nb/x210/devicetree.cb') diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index 3ffc00fa2e..a33ee18303 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -39,29 +39,6 @@ chip soc/intel/skylake register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s - # Enable Root Ports 3, 4 and 9 - register "PcieRpEnable[2]" = "1" # Ethernet controller - register "PcieRpClkReqSupport[2]" = "1" - register "PcieRpClkReqNumber[2]" = "0" - register "PcieRpClkSrcNumber[2]" = "0" - register "PcieRpAdvancedErrorReporting[2]" = "1" - register "PcieRpLtrEnable[2]" = "1" - - register "PcieRpEnable[3]" = "1" # Wireless controller - register "PcieRpClkReqSupport[3]" = "1" - register "PcieRpClkReqNumber[3]" = "1" - register "PcieRpClkSrcNumber[3]" = "1" - register "PcieRpAdvancedErrorReporting[3]" = "1" - register "PcieRpLtrEnable[3]" = "1" - - register "PcieRpEnable[8]" = "1" # NVMe controller - register "PcieRpClkReqSupport[8]" = "1" - register "PcieRpClkReqNumber[8]" = "4" - register "PcieRpClkSrcNumber[8]" = "4" - register "PcieRpAdvancedErrorReporting[8]" = "1" - register "PcieRpLtrEnable[8]" = "1" - - # PL1 override 25W # PL2 override 44W register "power_limits_config" = "{ @@ -110,9 +87,33 @@ chip soc/intel/skylake [2] = 1, }" end - device ref pcie_rp3 on end - device ref pcie_rp4 on end - device ref pcie_rp9 on end + device ref pcie_rp3 on + # Ethernet controller + register "PcieRpEnable[2]" = "1" + register "PcieRpClkReqSupport[2]" = "1" + register "PcieRpClkReqNumber[2]" = "0" + register "PcieRpClkSrcNumber[2]" = "0" + register "PcieRpAdvancedErrorReporting[2]" = "1" + register "PcieRpLtrEnable[2]" = "1" + end + device ref pcie_rp4 on + # Wireless controller + register "PcieRpEnable[3]" = "1" + register "PcieRpClkReqSupport[3]" = "1" + register "PcieRpClkReqNumber[3]" = "1" + register "PcieRpClkSrcNumber[3]" = "1" + register "PcieRpAdvancedErrorReporting[3]" = "1" + register "PcieRpLtrEnable[3]" = "1" + end + device ref pcie_rp9 on + # NVMe controller + register "PcieRpEnable[8]" = "1" + register "PcieRpClkReqSupport[8]" = "1" + register "PcieRpClkReqNumber[8]" = "4" + register "PcieRpClkSrcNumber[8]" = "4" + register "PcieRpAdvancedErrorReporting[8]" = "1" + register "PcieRpLtrEnable[8]" = "1" + end device ref lpc_espi on register "serirq_mode" = "SERIRQ_CONTINUOUS" -- cgit v1.2.3