From e0165fbc944521171cd2776be4d3f655712079d2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 9 Jan 2021 13:30:57 +0200 Subject: stage_cache: Add resume_from_stage_cache() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Factor out the condition when an attempt to load stage from cache can be tried. Change-Id: I936f07bed6fc82f46118d217f1fd233e2e041405 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50000 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/lib/prog_loaders.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'src/lib') diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 93efc0a280..4722e54501 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -76,9 +75,6 @@ int __weak prog_locate_hook(struct prog *prog) { return 0; } static void run_ramstage_from_resume(struct prog *ramstage) { - if (!romstage_handoff_is_resume()) - return; - /* Load the cached ramstage to runtime location. */ stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); @@ -119,7 +115,7 @@ void run_ramstage(void) * Only x86 systems using ramstage stage cache currently take the same * firmware path on resume. */ - if (ENV_X86 && !CONFIG(NO_STAGE_CACHE)) + if (ENV_X86 && resume_from_stage_cache()) run_ramstage_from_resume(&ramstage); vboot_run_logic(); -- cgit v1.2.3