From d840eb5719e51e1946ab322c0eb94defc72dde1d Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 24 May 2018 00:34:15 +0300 Subject: Remove AMD K8 cpu and northbridge support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I9c53dfa93bf906334f5c80e4525a1c27153656a3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26673 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/lib/generic_sdram.c | 48 ------------------------------------------------ 1 file changed, 48 deletions(-) delete mode 100644 src/lib/generic_sdram.c (limited to 'src/lib') diff --git a/src/lib/generic_sdram.c b/src/lib/generic_sdram.c deleted file mode 100644 index 6aa8d29962..0000000000 --- a/src/lib/generic_sdram.c +++ /dev/null @@ -1,48 +0,0 @@ -#include /* Prototypes */ - -/* Setup SDRAM */ -#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) -void sdram_initialize(int controllers, const struct mem_controller *ctrl, - void *sysinfo) -#else -void sdram_initialize(int controllers, const struct mem_controller *ctrl) -#endif -{ - int i; - /* Set the registers we can set once to reasonable values */ - for (i = 0; i < controllers; i++) { - printk(BIOS_DEBUG, "Ram1.%02x\n", i); - - #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) - sdram_set_registers(ctrl + i, sysinfo); - #else - sdram_set_registers(ctrl + i); - #endif - } - - /* Now setup those things we can auto detect */ - for (i = 0; i < controllers; i++) { - printk(BIOS_DEBUG, "Ram2.%02x\n", i); - - #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) - sdram_set_spd_registers(ctrl + i, sysinfo); - #else - sdram_set_spd_registers(ctrl + i); - #endif - - } - - /* Now that everything is setup enable the SDRAM. - * Some chipsets do the work for us while on others - * we need to it by hand. - */ - printk(BIOS_DEBUG, "Ram3\n"); - - #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) - sdram_enable(controllers, ctrl, sysinfo); - #else - sdram_enable(controllers, ctrl); - #endif - - printk(BIOS_DEBUG, "Ram4\n"); -} -- cgit v1.2.3