From d16c2aa6de75fb5f0bc4d73e77891461c6977968 Mon Sep 17 00:00:00 2001 From: Jianjun Wang Date: Thu, 31 Mar 2022 15:34:34 +0800 Subject: coreboot_tables: Add PCIe info to coreboot table Add 'lb_fill_pcie' function to pass PCIe information from coreboot to libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the __weak function. ARM platform usually does not have common address for PCIe to access the configuration space of devices. Therefore, new API is added to pass the base address of PCIe controller for payloads to access PCIe devices. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63251 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu Reviewed-by: Shelley Chen --- src/lib/coreboot_table.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/lib') diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index ebaa3a52f5..2a7ccc5f55 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -33,6 +33,11 @@ void lb_string_platform_blob_version(struct lb_header *header); #endif +__weak enum cb_err lb_fill_pcie(struct lb_pcie *pcie) +{ + return CB_ERR_NOT_IMPLEMENTED; +} + static struct lb_header *lb_table_init(unsigned long addr) { struct lb_header *header; @@ -118,6 +123,16 @@ void lb_add_console(uint16_t consoletype, void *data) console->type = consoletype; } +static void lb_pcie(struct lb_header *header) +{ + struct lb_pcie pcie = { .tag = LB_TAG_PCIE, .size = sizeof(pcie) }; + + if (lb_fill_pcie(&pcie) != CB_SUCCESS) + return; + + memcpy(lb_new_record(header), &pcie, sizeof(pcie)); +} + static void lb_framebuffer(struct lb_header *header) { struct lb_framebuffer *framebuffer; @@ -483,6 +498,9 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) if (CONFIG(CONSOLE_USB)) lb_add_console(LB_TAG_CONSOLE_EHCI, head); + if (CONFIG(PCI)) + lb_pcie(head); + /* Record our various random string information */ lb_strings(head); if (CONFIG(PLATFORM_USES_FSP2_0)) -- cgit v1.2.3