From 3306f37fd60ddb19e78816327dc0655dbf39186e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 26 Oct 2021 13:19:20 +0530 Subject: lib: Add new argument as `ddr_type` to smbios_bus_width_to_spd_width() Add DDR5 and LPDDR5 memory type checks while calculating bus width extension (in bits). Additionally, update all caller functions of smbios_bus_width_to_spd_width() to pass `MemoryType` as argument. Update `test_smbios_bus_width_to_spd_width()` to accommodate different memory types. Create new macro to fix incorrect bus width reporting on platform with DDR5 and LPDDR5 memory. With this code changes, on DDR5 system with 2 Ch per DIMM, 32 bit primary bus width per Ch showed the Total width as: Handle 0x000F, DMI type 17, 40 bytes Memory Device Array Handle: 0x0009 Error Information Handle: Not Provided Total Width: 80 bits Data Width: 64 bits Size: 16 GB ... BUG=b:194659789 Tested=On Alder Lake DDR5 RVP, SMBIOS type 17 shows expected `Total Width`. Change-Id: I79ec64c9d522a34cb44b3f575725571823048380 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/58601 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Rob Barnes --- src/lib/dimm_info_util.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/lib') diff --git a/src/lib/dimm_info_util.c b/src/lib/dimm_info_util.c index fb8e06f149..0e7cc12f18 100644 --- a/src/lib/dimm_info_util.c +++ b/src/lib/dimm_info_util.c @@ -5,7 +5,8 @@ #include #include -uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width) +uint8_t smbios_bus_width_to_spd_width(uint8_t ddr_type, uint16_t total_width, + uint16_t data_width) { uint8_t out; @@ -38,7 +39,10 @@ uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width) switch (extension_bits) { case 8: - out |= SPD_ECC_8BIT; + if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5) + out |= SPD_ECC_8BIT_LP5_DDR5; + else + out |= SPD_ECC_8BIT; break; case 0: /* No extension bits */ -- cgit v1.2.3