From 3067701108216cf5eb41198922a6050d6c662f11 Mon Sep 17 00:00:00 2001 From: Eric Lai Date: Thu, 14 Apr 2022 15:22:52 +0800 Subject: lib: Check for non-existent DIMMs in check_if_dimm_changed Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set it if Hw is not present. Also change the test case default to avoid 0. SODIMM SMbus address 0x50 to 0x53 is commonly used. BUG=b:213964936 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage The MRC training does not be performed again after rebooting. Signed-off-by: Eric Lai Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac Reviewed-on: https://review.coreboot.org/c/coreboot/+/63628 Tested-by: build bot (Jenkins) Reviewed-by: Frank Wu Reviewed-by: Lean Sheng Tan Reviewed-by: Subrata Banik Reviewed-by: Tim Wawrzynczak --- src/lib/spd_cache.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/lib/spd_cache.c') diff --git a/src/lib/spd_cache.c b/src/lib/spd_cache.c index 44830a8537..dff6ede860 100644 --- a/src/lib/spd_cache.c +++ b/src/lib/spd_cache.c @@ -155,6 +155,10 @@ bool check_if_dimm_changed(u8 *spd_cache, struct spd_block *blk) bool dimm_changed = false; /* Check if the dimm is the same with last system boot. */ for (i = 0; i < SC_SPD_NUMS && !dimm_changed; i++) { + if (blk->addr_map[i] == 0) { + printk(BIOS_NOTICE, "SPD_CACHE: DIMM%d does not exist\n", i); + continue; + } /* Return true if any error happened here. */ if (get_spd_sn(blk->addr_map[i], &sn) == CB_ERR) return true; -- cgit v1.2.3