From efe3cfb476b39da5ece2583000e0f24b5daf560b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Fri, 15 Nov 2019 22:47:33 +0100 Subject: include/device: add a comment to pci mmio cfg addr helpers and caching MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a comment to the newly introduced MMIO address helpers for PCI config registers, that the pointer returned may change during the boot processs and, thus, must not be cached. Change-Id: Ieb90ae9d67a3b944d35587dec54756a17c27c86f Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36875 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/include/device/pci_mmio_cfg.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/include') diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index 8f26ff29b0..30945f4c27 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -86,6 +86,12 @@ void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) pcicfg(dev)->reg32[reg / sizeof(uint32_t)] = value; } +/* + * The functions pci_mmio_config*_addr provide a way to determine the MMIO address of a PCI + * config register. The address returned is dependent of both the MMCONF base address and the + * assigned PCI bus number of the requested device, which both can change during the boot + * process. Thus, the pointer returned here must not be cached! + */ static __always_inline uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg) { -- cgit v1.2.3