From dcd3cef8744b9d126370565fb3551a1fced8ab04 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 16 May 2017 17:58:25 +0200 Subject: nb/intel/sandybridge: Improve CAS freq selection The previous code seemed weird and tried to check if its selected value is supported three times. This also lower the clock if a selected frequency does not result in a supported CAS number. Change-Id: I97244bc3940813c5a5fcbd770d71cca76d21fcae Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19716 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/include/device/dram/ddr3.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/include') diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 11f98c56af..9597a3140b 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -39,6 +39,8 @@ * These values are in 1/256 ns units. * @{ */ +#define NS2MHZ_DIV256 1000 << 8 + #define TCK_1333MHZ 192 #define TCK_1200MHZ 212 #define TCK_1100MHZ 232 -- cgit v1.2.3