From c2c634a089fa990418c363e2ff2e5ff70bdd3580 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Tue, 19 Nov 2019 18:37:28 +0100
Subject: nb/sb/cpu: Drop Intel Rangeley support
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Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I41589118579988617677cf48af5401bc35b23e05
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
---
 src/include/device/pci_ids.h | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src/include')

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 70cf3aa339..18d6f601c1 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2583,8 +2583,6 @@
 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX	0x1c5f
 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41
 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f
-#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MIN 0x1f38
-#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MAX 0x1f3b
 #define PCI_DEVICE_ID_INTEL_TGP_LPC	0x27bc
 
 /* Intel 82801E (C-ICH) */
-- 
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