From 89e6640bf911b607bb169984ee5f20be352d79fa Mon Sep 17 00:00:00 2001 From: Jamie Ryu Date: Tue, 29 Oct 2024 09:13:30 -0700 Subject: device/pci_ids, soc/intel/pantherlake: Add new PTL-H DID0 This patch adds new DID0 PCI device IDs for Intel PTL-H. Additionally, updates the System Agent driver's `systemagent_ids` list and Panther Lake SoC bootblock to support these new IDs. Source: Intel PTL-FAS. Document Number 812562 BUG=b:347669091 TEST=Build fatcat and boot with Panther Lake SoC with newly added MCH ID. With patch, coreboot log: `[DEBUG] MCH: device id b004 (rev 00) is Pantherlake H` `[DEBUG] MCH: device id b00a (rev 00) is Pantherlake H` Change-Id: I56e795696f661d88828d7549f856eee19c46c942 Signed-off-by: Jamie Ryu Reviewed-on: https://review.coreboot.org/c/coreboot/+/84916 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Wonkyu Kim --- src/include/device/pci_ids.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/include') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 4730f3f2d9..638689144d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4456,6 +4456,8 @@ #define PCI_DID_INTEL_PTL_U_ID_1 0xb000 #define PCI_DID_INTEL_PTL_H_ID_1 0xb001 #define PCI_DID_INTEL_PTL_H_ID_2 0xb002 +#define PCI_DID_INTEL_PTL_H_ID_3 0xb004 +#define PCI_DID_INTEL_PTL_H_ID_4 0xb00a #define PCI_DID_INTEL_SNR_ID 0x09a2 /* Intel SMBUS device Ids */ -- cgit v1.2.3