From 4f32b64e4f88038347bec1d80ee2af41470d03ca Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Fri, 5 Oct 2018 23:40:21 +0200 Subject: reset: Provide new single-function reset API board_reset() replaces the existing common reset API. There is no common distinction between reset types across platforms, hence, common code could never decide which one to call. Currently only hard_reset() is used by common code. We replace these calls and provide a fall-back to the current hard_reset() implemen- tation. The fall-back will be removed along with hard_reset() after the transition of all boards. Change-Id: I274a8cee9cb38226b5a0bdff6a847c74ef0b3128 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/29047 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner Reviewed-by: Aaron Durbin --- src/include/reset.h | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) (limited to 'src/include') diff --git a/src/include/reset.h b/src/include/reset.h index cf9d5744b2..fe6328d2d9 100644 --- a/src/include/reset.h +++ b/src/include/reset.h @@ -1,7 +1,43 @@ #ifndef RESET_H #define RESET_H -/* Generic reset functions. Call from code that wants to trigger a reset. */ +/* + * Generic board reset function. Call from common code that + * wants to trigger a reset. + */ +__noreturn void board_reset(void); +/* + * SoC or board specific implementation of the board reset. + * + * Implementations shall meet the following criteria: + * + * o For vboot support, the TPM MUST be reset. + * + * o All SoC/chipset blocks SHOULD be reset except for those + * that are intentionally meant to survive reset (e.g. tomb- + * stone registers and that sort of stuff). + * + * o All external SoC pins SHOULD return to power-on reset values. + * + * o The CPU MUST resume execution from power-on reset vector + * (same as cold boot). + * + * o Other board components (e.g. PCI, SDIO and stuff) SHOULD + * be reset. + * + * o USB SHOULD be power-cycled. + * + * o Board components that are intended to be fully independent + * from SoC (e.g. EC and EC-attached devices, the Cr50 on + * Chromebooks) SHOULD NOT be reset. + * + * General recommendations: + * + * o DRAM SHOULD NOT lose power if possible. + * + * o Reset time SHOULD be minimized + */ +void do_board_reset(void); /* Super-hard reset specific to some Intel SoCs. */ __noreturn void global_reset(void); -- cgit v1.2.3