From 4de1a31cb04f0363b6d257d9de392cdfe8d5644c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 15 Jan 2021 05:58:42 +0200 Subject: ACPI: Add acpi_reset_gnvs_for_wake() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With chipset_power_state filled in romstage CBMEM hooks and GNVS allocated early in ramstage, GNVS wake source is now also filled for normal boot path. Change-Id: I2d44770392d14d2d6e22cc98df9d1751c8717ff3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50004 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/include/acpi/acpi_gnvs.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/include') diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index 498743f897..86d68a4d31 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -5,12 +5,16 @@ #include +struct global_nvs; + void acpi_create_gnvs(void); #if CONFIG(ACPI_SOC_NVS) void *acpi_get_gnvs(void); void *acpi_get_device_nvs(void); +int acpi_reset_gnvs_for_wake(struct global_nvs **gnvs); #else static inline void *acpi_get_gnvs(void) { return NULL; } +static inline int acpi_reset_gnvs_for_wake(struct global_nvs **gnvs) { return -1; } #endif void gnvs_assign_chromeos(void *gnvs_section); @@ -21,7 +25,6 @@ void gnvs_set_ecfw_rw(void); * Defined as weak in common acpi as gnvs structure definition is * chipset specific. */ -struct global_nvs; void soc_fill_gnvs(struct global_nvs *gnvs); void mainboard_fill_gnvs(struct global_nvs *gnvs); -- cgit v1.2.3