From 481c52ddd5ea77fcf6767f358ae33246e91d63a8 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 8 Nov 2019 17:05:04 +0100 Subject: soc/intel/car: Add support for bootguard CAR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Bootguard sets up CAR/NEM on its own so the only thing needed is to find free MTRRs for our own CAR region and clear that area to fill in cache lines. TESTED on prodrive/hermes with bootguard enabled. Change-Id: Ifac5267f8f4b820a61519fb4a497e2ce7075cc40 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36682 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner Reviewed-by: Patrick Rudolph --- src/include/cpu/intel/msr.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/include') diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h index 6b2db88961..8efe4e2c62 100644 --- a/src/include/cpu/intel/msr.h +++ b/src/include/cpu/intel/msr.h @@ -12,6 +12,9 @@ #define MSR_PLATFORM_INFO 0xce +#define MSR_BC_PBEC 0x139 +#define B_STOP_PBET (1 << 0) + #define MSR_BOOT_GUARD_SACM_INFO 0x13a #define V_TPM_PRESENT_MASK 0x06 #define B_BOOT_GUARD_SACM_INFO_NEM_ENABLED (1 << 0) -- cgit v1.2.3