From 34745f613f4a2970b2298bd76bfaf737229a4a3a Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Fri, 15 Feb 2019 05:36:50 -0800 Subject: soc/intel/common: Add whiskeylake celeron v-0 support New whiskeylake v-0 stepping have changed the graphics device id from 0x3EA0 to 0x3EA1 for celeron, so declare that in common code. Also the CPUID was changed from 806EB to 806EC, include that as well. Signed-off-by: Lijian Zhao Change-Id: Ief5213a96507124b90f8dd2eeea2f6bf43843dc6 Reviewed-on: https://review.coreboot.org/c/31433 Reviewed-by: Patrick Rudolph Reviewed-by: EricR Lai Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/include/device/pci_ids.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/include') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 751cca0289..00309612b3 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2969,6 +2969,7 @@ #define PCI_DEVICE_ID_INTEL_APL_IGD_HD_500 0x5a85 #define PCI_DEVICE_ID_INTEL_GLK_IGD 0x3184 #define PCI_DEVICE_ID_INTEL_GLK_IGD_EU12 0x3185 +#define PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1 0x3EA1 #define PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1 0x3EA0 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1 0x5A51 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2 0x5A59 -- cgit v1.2.3