From 33005df7bcc63550955986f8f6714c595b3b8d70 Mon Sep 17 00:00:00 2001 From: Ravi Sarawadi Date: Tue, 11 Oct 2022 23:54:55 -0700 Subject: soc/intel: Add Meteor Lake IGD device id 0x7d45 Add new IGD device. Reference: EDS Vol 1 (640228) Signed-off-by: Ravi Sarawadi Change-Id: Iad69f547a981390ef3749256e9fd9bcfc106fe3c Reviewed-on: https://review.coreboot.org/c/coreboot/+/68305 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Kapil Porwal Reviewed-by: Angel Pons --- src/include/device/pci_ids.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/include') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 949afbdd90..5e270cec1f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4001,9 +4001,10 @@ #define PCI_DID_INTEL_ADL_N_GT2 0x46D1 #define PCI_DID_INTEL_ADL_N_GT3 0x46D2 #define PCI_DID_INTEL_MTL_M_GT2 0x7d40 -#define PCI_DID_INTEL_MTL_P_GT2_1 0x7d50 -#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d55 -#define PCI_DID_INTEL_MTL_P_GT2_3 0x7d60 +#define PCI_DID_INTEL_MTL_P_GT2_1 0x7d45 +#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d50 +#define PCI_DID_INTEL_MTL_P_GT2_3 0x7d55 +#define PCI_DID_INTEL_MTL_P_GT2_4 0x7d60 #define PCI_DID_INTEL_RPL_P_GT1 0xa720 #define PCI_DID_INTEL_RPL_P_GT2 0xa7a8 #define PCI_DID_INTEL_RPL_P_GT3 0xa7a0 -- cgit v1.2.3