From 25c20753885fb183424b5d74445a3a8643fe2d28 Mon Sep 17 00:00:00 2001 From: Wonkyu Kim Date: Mon, 4 Jul 2022 20:43:47 -0700 Subject: soc/intel/common/graphics: Add another Meteor Lake device ID Add 0x7d55 as another ID for Meteor Lake graphics controllers. TEST=Boot with MTL silicon to check coreboot log for DID2 Signed-off-by: Wonkyu Kim Change-Id: Iea01f6d4f2469fc0eeac73a3f1c4b9af1f39463c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65647 Tested-by: build bot (Jenkins) Reviewed-by: Srinidhi N Kaushik Reviewed-by: Subrata Banik Reviewed-by: Jamie Ryu --- src/include/device/pci_ids.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/include') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 429a89bb2c..ec48a120ec 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4009,7 +4009,8 @@ #define PCI_DID_INTEL_ADL_N_GT3 0x46D2 #define PCI_DID_INTEL_MTL_M_GT2 0x7d40 #define PCI_DID_INTEL_MTL_P_GT2_1 0x7d50 -#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d60 +#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d55 +#define PCI_DID_INTEL_MTL_P_GT2_3 0x7d60 #define PCI_DID_INTEL_RPL_P_GT1 0xa720 #define PCI_DID_INTEL_RPL_P_GT2 0xa7a8 #define PCI_DID_INTEL_RPL_P_GT3 0xa7a0 -- cgit v1.2.3