From 254a4b9072d94136ff63a4e9ef327fecdce9baf9 Mon Sep 17 00:00:00 2001 From: Saurabh Mishra Date: Fri, 12 Apr 2024 19:41:21 +0530 Subject: soc/intel/lunarlake: Support stepping A0_2 Details: - Add support for new Lunar Lake MCH ID 0x6410 - Add new CPU id 0xb06d1 Reference: Lunar Lake External Design Specification Volume 1 (734362) TEST=Build, boot the system and verfiy MCH-ID prints in bootblock stage. Below prints verified on Lunar Lake RVP board (lnlrvp). [DEBUG] MCH: device id 6410 (rev 02) is LunarLake M Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Signed-off-by: Saurabh Mishra Reviewed-on: https://review.coreboot.org/c/coreboot/+/81847 Reviewed-by: Paul Menzel Reviewed-by: Wonkyu Kim Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/include/cpu/intel/cpu_ids.h | 1 + src/include/device/pci_ids.h | 1 + 2 files changed, 2 insertions(+) (limited to 'src/include') diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index ddb4e54c1e..1de1d717d5 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -81,5 +81,6 @@ #define CPUID_RAPTORLAKE_J0 0xb06a2 #define CPUID_RAPTORLAKE_Q0 0xb06a3 #define CPUID_LUNARLAKE_A0_1 0xb06d0 +#define CPUID_LUNARLAKE_A0_2 0xb06d1 #endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index d6f8dd3078..5500d279bf 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4292,6 +4292,7 @@ #define PCI_DID_INTEL_RPL_P_ID_7 0xa70a #define PCI_DID_INTEL_RPL_P_ID_8 0xa716 #define PCI_DID_INTEL_LNL_M_ID 0x6400 +#define PCI_DID_INTEL_LNL_M_ID_1 0x6410 /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 -- cgit v1.2.3