From 2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 9 Jul 2020 07:13:37 +0300 Subject: arch/x86: Drop CBMEM_TOP_BACKUP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Code has evolved such that there seems to be little use for global definition of cbmem_top_chipset(). Even for AMD we had three different implementations. Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326 Reviewed-by: Angel Pons Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/include/cbmem.h | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/include') diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 4cc4045055..b548cd9559 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -139,17 +139,6 @@ void cbmem_add_records_to_cbtable(struct lb_header *header); static cbmem_init_hook_t init_fn_ ## _unused3_ = init_fn_; #endif /* ENV_RAMSTAGE */ - -/* Any new chipset and board must implement cbmem_top() for both - * romstage and ramstage to support early features like COLLECT_TIMESTAMPS - * and CBMEM_CONSOLE. Sometimes it is necessary to have cbmem_top() - * value stored in nvram to enable early recovery on S3 path. - */ -#if ENV_X86 -void backup_top_of_low_cacheable(uintptr_t ramtop); -uintptr_t restore_top_of_low_cacheable(void); -#endif - /* * Returns 0 for the stages where we know that cbmem does not come online. * Even if this function returns 1 for romstage, depending upon the point in -- cgit v1.2.3