From 0a466040e0dc3351ac819ba00146f284e5f70f05 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 27 Feb 2023 23:56:39 +0100 Subject: soc/amd: introduce and use PSTATE_MSR macro Instead of adding the P-state number to the PSTATE_0_MSR number to get the P-state MSR number for the rdmsr call, provide a macro that directly calculates the MSR number for a given power state. Also drop the unused PSTATE_[1..4]_MSR definitions which also didn't cover all P-state MSRs available in the hardware. Signed-off-by: Felix Held Change-Id: If85acf556efe82c209e1608e56c05f7a2a748403 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73323 Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas Reviewed-by: Fred Reitberger Reviewed-by: Arthur Heymans --- src/include/cpu/amd/msr.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/include') diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h index 76e6a8d665..1fd7ec7dbc 100644 --- a/src/include/cpu/amd/msr.h +++ b/src/include/cpu/amd/msr.h @@ -40,10 +40,7 @@ /* P-state Status Register */ #define PS_STS_REG 0xC0010063 #define PSTATE_0_MSR 0xC0010064 -#define PSTATE_1_MSR 0xC0010065 -#define PSTATE_2_MSR 0xC0010066 -#define PSTATE_3_MSR 0xC0010067 -#define PSTATE_4_MSR 0xC0010068 +#define PSTATE_MSR(pstate) (PSTATE_0_MSR + (pstate)) #define MSR_PATCH_LOADER 0xC0010020 #define MSR_COFVID_STS 0xC0010071 -- cgit v1.2.3