From fb032398d262ff7594c35c65b6f14897bb331a39 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 15 Jan 2015 15:28:46 -0800 Subject: spi: Add function to read flash status register Add a function that allows reading of the status register from the SPI chip. This can be used to determine whether write protection is enabled on the chip. BUG=chrome-os-partner:35209 BRANCH=haswell TEST=build and boot on peppy Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/240702 Reviewed-by: Shawn N (cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545) Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d Signed-off-by: Patrick Georgi Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5 Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/241128 Original-Reviewed-by: Shawn N Reviewed-on: http://review.coreboot.org/9730 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/include/spi_flash.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/include/spi_flash.h') diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index cbb5919332..3865a53dcc 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -40,12 +40,15 @@ struct spi_flash { u8 erase_cmd; + u8 status_cmd; + int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); int (*write)(struct spi_flash *flash, u32 offset, size_t len, const void *buf); int (*erase)(struct spi_flash *flash, u32 offset, size_t len); + int (*status)(struct spi_flash *flash, u8 *reg); }; struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs); -- cgit v1.2.3