From 1110495de926db4b21b9969da522e5270c67f115 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 29 Jun 2014 16:17:33 +0300 Subject: SPI: Split writes using spi_crop_chunk() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SPI controllers in Intel and AMD bridges have a slightly different restriction on how long transactions they can handle. Change-Id: I3d149d4b7e7e9633482a153d5e380a86c553d871 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6163 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/include/spi_flash.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/include/spi_flash.h') diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 61c931e32c..70ca784c90 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -39,14 +39,6 @@ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) -#define CONFIG_ICH_SPI -#ifdef CONFIG_ICH_SPI -#define CONTROLLER_PAGE_LIMIT 64 -#else -/* any number larger than 4K would do, actually */ -#define CONTROLLER_PAGE_LIMIT ((int)(~0U>>1)) -#endif - struct spi_flash { struct spi_slave *spi; -- cgit v1.2.3