From 4a216475f5382d4b0ccf5fb65cd79b7ca3b32ed4 Mon Sep 17 00:00:00 2001 From: Jacob Garber Date: Fri, 27 Dec 2019 14:18:32 -0700 Subject: src: Remove some romcc workarounds Now that romcc is gone, move cmos_post_init() into post.c, and remove some preprocessor workarounds. Change-Id: I0ee4551e476cdd1102e86e7efc74d5909f64a37b Signed-off-by: Jacob Garber Reviewed-on: https://review.coreboot.org/c/coreboot/+/37950 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: HAOUAS Elyes --- src/include/pc80/mc146818rtc.h | 27 +-------------------------- 1 file changed, 1 insertion(+), 26 deletions(-) (limited to 'src/include/pc80') diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index afa4d9714c..ecfa76dfbb 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -223,32 +223,7 @@ int do_normal_boot(void); #define CMOS_POST_EXTRA_DEV_PATH 0x01 void cmos_post_log(void); - -/* cmos_post_init() is exposed in this manner because it also needs to be called - * by bootblock code compiled by romcc. */ -static inline void cmos_post_init(void) -{ - u8 magic = CMOS_POST_BANK_0_MAGIC; - - /* Switch to the other bank */ - switch (cmos_read(CMOS_POST_BANK_OFFSET)) { - case CMOS_POST_BANK_1_MAGIC: - break; - case CMOS_POST_BANK_0_MAGIC: - magic = CMOS_POST_BANK_1_MAGIC; - break; - default: - /* Initialize to zero */ - cmos_write(0, CMOS_POST_BANK_0_OFFSET); - cmos_write(0, CMOS_POST_BANK_1_OFFSET); -#if CONFIG(CMOS_POST_EXTRA) - cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); - cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); -#endif - } - - cmos_write(magic, CMOS_POST_BANK_OFFSET); -} +void cmos_post_init(void); #else static inline void cmos_post_log(void) {} static inline void cmos_post_init(void) {} -- cgit v1.2.3