From 3f4af0da938e0d9f4d80e77a3d8abd1f6400e57e Mon Sep 17 00:00:00 2001 From: Meera Ravindranath Date: Wed, 12 Feb 2020 16:01:22 +0530 Subject: soc/intel/common: Update Jasper Lake Device IDs Update Jasper Lake CPU, SA and PCH IDs. BUG=b:149185282 BRANCH=None TEST=Compilation for Jasper Lake board is working Change-Id: I2c9ec1eb4236184b981d99250f263172c82f7117 Signed-off-by: Meera Ravindranath Signed-off-by: Varshit Pandya Reviewed-on: https://review.coreboot.org/c/coreboot/+/38849 Tested-by: build bot (Jenkins) Reviewed-by: Aamir Bohra Reviewed-by: Wonkyu Kim --- src/include/device/pci_ids.h | 77 +++++++++++++++++++++++++------------------- 1 file changed, 43 insertions(+), 34 deletions(-) (limited to 'src/include/device') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c6602c44e3..47b182577d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2809,8 +2809,6 @@ #define PCI_DEVICE_ID_INTEL_TGP_ESPI_24 0xA09D #define PCI_DEVICE_ID_INTEL_TGP_ESPI_25 0xA09E #define PCI_DEVICE_ID_INTEL_TGP_ESPI_26 0xA09F -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1 0x3887 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2 0x4d80 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_0 0x4b00 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_1 0x4b04 #define PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI 0x4b03 @@ -2819,6 +2817,7 @@ #define PCI_DEVICE_ID_INTEL_MCC_ESPI_2 0x4b05 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_3 0x4b06 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_4 0x4b07 +#define PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI 0X4d87 /* Intel PCIE device ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1 0x9d10 @@ -3014,6 +3013,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14 0x02b5 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15 0x02b6 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16 0x02b7 + #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1 0x06b8 #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2 0x06b9 #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3 0x06ba @@ -3038,14 +3038,15 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22 0x06ad #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23 0x06ae #define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24 0x06af -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP1 0x38b8 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP2 0x38b9 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP3 0x38ba -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP4 0x38bb -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP5 0x38bc -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP6 0x38bd -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7 0x38be -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8 0x38bf + +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP1 0x4db8 +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP2 0x4db9 +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP3 0x4dba +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP4 0x4dbb +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP5 0x4dbc +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP6 0x4dbd +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP7 0x4dbe +#define PCI_DEVICE_ID_INTEL_JSP_PCIE_RP8 0x4dbf #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1 0x4b38 #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2 0x4b39 @@ -3089,8 +3090,9 @@ #define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7 #define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA 0x282a -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SATA 0x38d3 #define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60 +#define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2 +#define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3 /* Intel PMC device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21 @@ -3106,8 +3108,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1 #define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1 #define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC 0x38a1 #define PCI_DEVICE_ID_INTEL_MCC_PMC 0x4b21 +#define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1 /* Intel I2C device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_I2C0 0x9d60 @@ -3178,12 +3180,13 @@ #define PCI_DEVICE_ID_INTEL_MCC_I2C5 0x4b4c #define PCI_DEVICE_ID_INTEL_MCC_I2C6 0x4b44 #define PCI_DEVICE_ID_INTEL_MCC_I2C7 0x4b45 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C0 0x38e8 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C1 0x38e9 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C2 0x38ea -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C3 0x38eb -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C4 0x38c5 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C5 0x38c6 + +#define PCI_DEVICE_ID_INTEL_JSP_I2C0 0x4de8 +#define PCI_DEVICE_ID_INTEL_JSP_I2C1 0x4de9 +#define PCI_DEVICE_ID_INTEL_JSP_I2C2 0x4dea +#define PCI_DEVICE_ID_INTEL_JSP_I2C3 0x4deb +#define PCI_DEVICE_ID_INTEL_JSP_I2C4 0x4dc5 +#define PCI_DEVICE_ID_INTEL_JSP_I2C5 0x4dc6 /* Intel UART device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_UART0 0x9d27 @@ -3224,9 +3227,9 @@ #define PCI_DEVICE_ID_INTEL_MCC_UART0 0x4b28 #define PCI_DEVICE_ID_INTEL_MCC_UART1 0x4b29 #define PCI_DEVICE_ID_INTEL_MCC_UART2 0x4b4d -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0 0x38a8 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1 0x38a9 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2 0x38c7 +#define PCI_DEVICE_ID_INTEL_JSP_UART0 0x4da8 +#define PCI_DEVICE_ID_INTEL_JSP_UART1 0x4da9 +#define PCI_DEVICE_ID_INTEL_JSP_UART2 0x4dc7 /* Intel SPI device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_SPI1 0x9d24 @@ -3273,10 +3276,10 @@ #define PCI_DEVICE_ID_INTEL_MCC_GSPI0 0x4b2a #define PCI_DEVICE_ID_INTEL_MCC_GSPI1 0x4b2b #define PCI_DEVICE_ID_INTEL_MCC_GSPI2 0x4b37 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI0 0x38aa -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI1 0x38ab -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI2 0x38fb -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_HWSEQ_SPI 0x38a4 +#define PCI_DEVICE_ID_INTEL_JSP_SPI0 0x4daa +#define PCI_DEVICE_ID_INTEL_JSP_SPI1 0x4dab +#define PCI_DEVICE_ID_INTEL_JSP_SPI2 0x4dfb +#define PCI_DEVICE_ID_INTEL_JSP_HWSEQ_SPI 0x4da4 /* Intel IGD device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902 @@ -3387,7 +3390,8 @@ #define PCI_DEVICE_ID_INTEL_EHL_GT2_2 0x4550 #define PCI_DEVICE_ID_INTEL_EHL_GT1_3 0x4571 #define PCI_DEVICE_ID_INTEL_EHL_GT2_3 0x4570 -#define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0 0x4569 +#define PCI_DEVICE_ID_INTEL_JSL_GT1 0x4E51 +#define PCI_DEVICE_ID_INTEL_JSL_GT2 0x4E71 /* Intel Northbridge Ids */ #define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0 @@ -3447,9 +3451,9 @@ #define PCI_DEVICE_ID_INTEL_TGL_ID_U_1 0x9A12 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2 0x9A04 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y 0x9A10 -#define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD 0x4e2a #define PCI_DEVICE_ID_INTEL_JSL_EHL 0x4532 #define PCI_DEVICE_ID_INTEL_EHL_ID_1 0x4510 +#define PCI_DEVICE_ID_INTEL_JSL_ID_1 0x4e22 /* Intel SMBUS device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23 @@ -3462,8 +3466,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3 #define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS 0x38a3 #define PCI_DEVICE_ID_INTEL_MCC_SMBUS 0x4b23 +#define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3 /* Intel XHCI device Ids */ #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8 @@ -3479,8 +3483,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_XHCI 0x02ed #define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI 0x38ed #define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d +#define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded /* Intel P2SB device Ids */ #define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92 @@ -3496,8 +3500,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0 #define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0 #define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB 0x38a0 #define PCI_DEVICE_ID_INTEL_EHL_P2SB 0x4b20 +#define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0 /* Intel SRAM device Ids */ #define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec @@ -3508,8 +3512,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef #define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM 0x38ef #define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f +#define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def /* Intel AUDIO device Ids */ #define PCI_DEVICE_ID_INTEL_APL_AUDIO 0x5a98 @@ -3526,8 +3530,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO 0x38c8 #define PCI_DEVICE_ID_INTEL_MCC_AUDIO 0x4b55 +#define PCI_DEVICE_ID_INTEL_JSP_AUDIO 0x4dc8 /* Intel HECI/ME device Ids */ #define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a @@ -3545,11 +3549,14 @@ #define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0 #define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0 #define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0 0x38e0 #define PCI_DEVICE_ID_INTEL_MCC_CSE0 0x4b70 #define PCI_DEVICE_ID_INTEL_MCC_CSE1 0x4b71 #define PCI_DEVICE_ID_INTEL_MCC_CSE2 0x4b74 #define PCI_DEVICE_ID_INTEL_MCC_CSE3 0x4b75 +#define PCI_DEVICE_ID_INTEL_JSP_CSE0 0x4de0 +#define PCI_DEVICE_ID_INTEL_JSP_CSE1 0x4de1 +#define PCI_DEVICE_ID_INTEL_JSP_CSE2 0x4de4 +#define PCI_DEVICE_ID_INTEL_JSP_CSE3 0x4de5 /* Intel XDCI device Ids */ #define PCI_DEVICE_ID_INTEL_APL_XDCI 0x5aaa @@ -3562,6 +3569,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee #define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e +#define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee /* Intel SD device Ids */ #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca @@ -3572,12 +3580,13 @@ #define PCI_DEVICE_ID_INTEL_ICL_SD 0x34f8 #define PCI_DEVICE_ID_INTEL_CMP_SD 0x02f5 #define PCI_DEVICE_ID_INTEL_CMP_H_SD 0x06f5 -#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD 0x38f8 #define PCI_DEVICE_ID_INTEL_MCC_SD 0x4b48 +#define PCI_DEVICE_ID_INTEL_JSP_SD 0x4df8 /* Intel EMMC device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_EMMC 0x9d2b #define PCI_DEVICE_ID_INTEL_CMP_EMMC 0x02c4 +#define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4 /* Intel WIFI Ids */ #define PCI_DEVICE_ID_1000_SERIES_WIFI 0x0084 -- cgit v1.2.3