From 8f22136c051f04ef0102fd468ba01a0f10f1a37c Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Fri, 8 Nov 2019 22:02:02 +0100 Subject: include/device: add pci mmio cfg address helpers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add helpers for getting the pci mmio cfg address for a register. Change-Id: Ie6fe22cacc7241a51d47cbe9fc64f30fa49d5a80 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36686 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/include/device/pci_mmio_cfg.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/include/device/pci_mmio_cfg.h') diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index e3c5fe4873..8f26ff29b0 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -86,6 +86,24 @@ void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) pcicfg(dev)->reg32[reg / sizeof(uint32_t)] = value; } +static __always_inline +uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg) +{ + return (uint8_t *)&pcicfg(dev)->reg8[reg]; +} + +static __always_inline +uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg) +{ + return (uint16_t *)&pcicfg(dev)->reg16[reg / sizeof(uint16_t)]; +} + +static __always_inline +uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg) +{ + return (uint32_t *)&pcicfg(dev)->reg32[reg / sizeof(uint32_t)]; +} + #endif /* !defined(__ROMCC__) */ #if CONFIG(MMCONF_SUPPORT) -- cgit v1.2.3