From 529a64b788888aa21189104309a5e9e814bcb0e0 Mon Sep 17 00:00:00 2001 From: zhixingma Date: Mon, 13 Jun 2022 15:06:27 -0700 Subject: soc/intel: Add Raptor Lake device IDs Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs. References: RaptorLake External Design Specification Volume 1 (640555) 600/700 Series PCH External Design Specification Volume 1 (626817) BUG=b:229134437 BRANCH=firmware-brya-14505.B TEST=Booted to OS on adlrvp + rpl silicon Signed-off-by: Zhixing Ma Change-Id: I8e8b9ec6ae82de7d7aa2302097fc66f47b782323 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65117 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/include/device/pci_ids.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/include/device/pci_ids.h') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c997da44b4..429a89bb2c 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4013,7 +4013,9 @@ #define PCI_DID_INTEL_RPL_P_GT1 0xa720 #define PCI_DID_INTEL_RPL_P_GT2 0xa7a8 #define PCI_DID_INTEL_RPL_P_GT3 0xa7a0 - +#define PCI_DID_INTEL_RPL_P_GT4 0xa7a9 +#define PCI_DID_INTEL_RPL_P_GT5 0xa7a1 +#define PCI_DID_INTEL_RPL_P_GT6 0xa721 /* Intel Northbridge Ids */ #define PCI_DID_INTEL_APL_NB 0x5af0 @@ -4136,6 +4138,7 @@ #define PCI_DID_INTEL_MTL_P_ID_3 0x7d14 #define PCI_DID_INTEL_RPL_P_ID_1 0xa706 #define PCI_DID_INTEL_RPL_P_ID_2 0xa707 +#define PCI_DID_INTEL_RPL_P_ID_3 0xa708 /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 -- cgit v1.2.3