From dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Thu, 21 Oct 2004 10:44:08 +0000 Subject: - Bump the LinuxBIOS major version - Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/include/device/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/include/device/pci.h') diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 13414a7df6..228d4f6e7e 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -50,6 +50,7 @@ void pci_bus_enable_resources(device_t dev); unsigned int pci_scan_bridge(device_t bus, unsigned int max); unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); struct resource *pci_get_resource(struct device *dev, unsigned long index); +void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); #define PCI_IO_BRIDGE_ALIGN 4096 #define PCI_MEM_BRIDGE_ALIGN (1024*1024) -- cgit v1.2.3