From 97b337b252fe67f8ffb7a98f70f08835513920ba Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 22 Jan 2018 01:26:53 +0100 Subject: device/dram/ddr2.c: Add methods to compute to identify dram DDR2 DIMMs are uniquely defined by SPD byte 64 till 72 and 93 till 98. Compute a crc16 over that data to provide a solid way to check DIMM identify. Reuse the crc16 function from ddr3.c to do this. Change-Id: I3c0c42786197f9b4eb3e42261c10ff5e4266120f Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23345 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/include/device/dram/common.h | 2 ++ src/include/device/dram/ddr2.h | 1 + 2 files changed, 3 insertions(+) (limited to 'src/include/device/dram') diff --git a/src/include/device/dram/common.h b/src/include/device/dram/common.h index 47023704fe..31cdb2bb5b 100644 --- a/src/include/device/dram/common.h +++ b/src/include/device/dram/common.h @@ -67,4 +67,6 @@ enum spd_status { SPD_STATUS_INVALID_FIELD, }; +u16 ddr3_crc16(const u8 *ptr, int n_crc); + #endif /* DEVICE_DRAM_COMMON_H */ diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h index 4aad1bcd8f..9bbbfe9652 100644 --- a/src/include/device/dram/ddr2.h +++ b/src/include/device/dram/ddr2.h @@ -179,5 +179,6 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]); void dram_print_spd_ddr2(const struct dimm_attr_ddr2_st *dimm); void normalize_tck(u32 *tclk); u8 spd_get_msbs(u8 c); +u16 spd_ddr2_calc_unique_crc(const u8 *spd, int len); #endif /* DEVICE_DRAM_DDR2L_H */ -- cgit v1.2.3