From fc31e44e47751a7cbffea19920f1f5ef34c6bc13 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 12 Feb 2018 15:12:34 +0100 Subject: device/ddr2,ddr3: Rename and move a few things MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In order for ddr2.h and ddr3.h to be included in the same file it cannot have conflicting definitions, therefore rename a few things and move some things to a common header. Change-Id: I6056148872076048e055f1d20a60ac31afd7cde6 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23717 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer --- src/include/device/dram/ddr3.h | 36 ++---------------------------------- 1 file changed, 2 insertions(+), 34 deletions(-) (limited to 'src/include/device/dram/ddr3.h') diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 2cfd6acbff..0756095588 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -31,6 +31,8 @@ #include #include +#include + /** * Convenience definitions for SPD offsets @@ -45,32 +47,6 @@ #define SPD_DIMM_PART_LEN 18 /** @} */ -/** - * \brief Convenience definitions for TCK values - * - * Different values for tCK, representing standard DDR3 frequencies. - * These values are in 1/256 ns units. - * @{ - */ -#define NS2MHZ_DIV256 (1000 << 8) - -#define TCK_1333MHZ 192 -#define TCK_1200MHZ 212 -#define TCK_1100MHZ 232 -#define TCK_1066MHZ 240 -#define TCK_1000MHZ 256 -#define TCK_933MHZ 274 -#define TCK_900MHZ 284 -#define TCK_800MHZ 320 -#define TCK_700MHZ 365 -#define TCK_666MHZ 384 -#define TCK_533MHZ 480 -#define TCK_400MHZ 640 -#define TCK_333MHZ 768 -#define TCK_266MHZ 960 -#define TCK_200MHZ 1280 -/** @} */ - /** * \brief Convenience macro for enabling printk with CONFIG_DEBUG_RAM_SETUP * @@ -198,14 +174,6 @@ typedef struct dimm_attr_st { u8 part_number[17]; } dimm_attr; -/** Result of the SPD decoding process */ -enum spd_status { - SPD_STATUS_OK = 0, - SPD_STATUS_INVALID, - SPD_STATUS_CRC_ERROR, - SPD_STATUS_INVALID_FIELD, -}; - enum ddr3_xmp_profile { DDR3_XMP_PROFILE_1 = 0, DDR3_XMP_PROFILE_2 = 1, -- cgit v1.2.3