From 5aaa8ce21c85a41c313c18ca7a4e41a25ab711d9 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 2 Sep 2016 13:29:17 -0500 Subject: haswell: add CBMEM_MEMINFO table when initing RAM Populate a memory_info struct with PEI and SPD data, in order to inject the CBMEM_INFO table necessary to populate a type17 SMBIOS table. On Broadwell, this is done by the MRC binary, but the older Haswell MRC binary doesn't populate the pei_data struct with all the info needed, so we have to pull it from the SPD. Some values are hardcoded based on platform specifications. Change-Id: Iea837d23f2c9c1c943e0db28cf81b265f054e9d1 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/19958 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/include/device/dram/ddr3.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/include/device/dram/ddr3.h') diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 9597a3140b..5961f4106b 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -32,6 +32,19 @@ #include #include +/** + * Convenience definitions for SPD offsets + * + * @{ + */ +#define SPD_DIMM_MOD_ID1 117 +#define SPD_DIMM_MOD_ID2 118 +#define SPD_DIMM_SERIAL_NUM 122 +#define SPD_DIMM_SERIAL_LEN 4 +#define SPD_DIMM_PART_NUM 128 +#define SPD_DIMM_PART_LEN 18 +/** @} */ + /** * \brief Convenience definitions for TCK values * -- cgit v1.2.3