From 577aad6f132da51640b6fe5c72fa8f14718c5c34 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Tue, 14 Jun 2016 18:48:17 +0200 Subject: include/device/dram/ddr3: Add additional frequencies MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit IvyBridge memory controller supports more frequencies than SandyBridge. Required for future patches. Change-Id: I0bcb670c20407ec0aec20bae85c4cbe6ccc44b16 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/15182 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens Reviewed-by: Kyösti Mälkki --- src/include/device/dram/ddr3.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/include/device/dram/ddr3.h') diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index d58cdce8e1..eae7840fd2 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -35,9 +35,13 @@ */ #define TCK_1333MHZ 192 #define TCK_1200MHZ 212 +#define TCK_1100MHZ 232 #define TCK_1066MHZ 240 +#define TCK_1000MHZ 256 #define TCK_933MHZ 274 +#define TCK_900MHZ 284 #define TCK_800MHZ 320 +#define TCK_700MHZ 365 #define TCK_666MHZ 384 #define TCK_533MHZ 480 #define TCK_400MHZ 640 -- cgit v1.2.3