From 5a04746714ddf1fdf4c0e1c9ed8cea4aa7fea511 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Wed, 28 Dec 2022 11:43:49 +0100 Subject: spd.h: Move enum ddr2_module_type to ddr2.h Move specific enum ddr2_module_type to . Change-Id: I748658f9b349bff9b1ebe2c0a6acf71bf2a221ce Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/71546 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/include/device/dram/ddr2.h | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) (limited to 'src/include/device/dram/ddr2.h') diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h index 6200fdedd6..9277ffbc02 100644 --- a/src/include/device/dram/ddr2.h +++ b/src/include/device/dram/ddr2.h @@ -18,15 +18,12 @@ #include #include -/* - * Module type (byte 20, bits 5:0) of SPD - * This definition is specific to DDR2. DDR3 SPDs have a different structure. - */ +/* Byte 20 [5:0]: DDR2 Module type information */ enum spd_dimm_type_ddr2 { - SPD_DDR2_DIMM_TYPE_UNDEFINED = 0x00, - SPD_DDR2_DIMM_TYPE_RDIMM = 0x01, - SPD_DDR2_DIMM_TYPE_UDIMM = 0x02, - SPD_DDR2_DIMM_TYPE_SO_DIMM = 0x04, + SPD_DDR2_DIMM_TYPE_UNDEFINED = 0x00, + SPD_DDR2_DIMM_TYPE_RDIMM = 0x01, + SPD_DDR2_DIMM_TYPE_UDIMM = 0x02, + SPD_DDR2_DIMM_TYPE_SO_DIMM = 0x04, SPD_DDR2_DIMM_TYPE_72B_SO_CDIMM = 0x06, SPD_DDR2_DIMM_TYPE_72B_SO_RDIMM = 0x07, SPD_DDR2_DIMM_TYPE_MICRO_DIMM = 0x08, -- cgit v1.2.3