From f3c42825f3d984ff6246789167a527ad51b6d094 Mon Sep 17 00:00:00 2001
From: Meera Ravindranath <meera.ravindranath@intel.com>
Date: Mon, 13 Sep 2021 13:35:34 +0530
Subject: soc/intel/alderlake: Add CPU ID 0x906a4

TEST=Build and boot brya

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I4342c7343876eb40c2955f6f4dd99d6346852dc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
---
 src/include/cpu/intel/cpu_ids.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/include/cpu')

diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index 8d03d75e6a..53140762d4 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -54,5 +54,6 @@
 #define CPUID_ALDERLAKE_A0		0x906a0
 #define CPUID_ALDERLAKE_A1		0x906a1
 #define CPUID_ALDERLAKE_A2		0x906a2
+#define CPUID_ALDERLAKE_A3		0x906a4
 
 #endif /* CPU_INTEL_CPU_IDS_H */
-- 
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