From 9634547eae10dc6b30014208124d54a6ddc7f987 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 14:13:53 -0600 Subject: src/include: add IS_ENABLED() around Kconfig symbol references MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20354 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/include/cpu/amd/car.h | 3 ++- src/include/cpu/x86/lapic.h | 6 +++--- src/include/cpu/x86/post_code.h | 2 +- src/include/cpu/x86/smm.h | 4 ++-- src/include/cpu/x86/tsc.h | 4 ++-- 5 files changed, 10 insertions(+), 9 deletions(-) (limited to 'src/include/cpu') diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h index 89f29c2486..e0a78544b6 100644 --- a/src/include/cpu/amd/car.h +++ b/src/include/cpu/amd/car.h @@ -10,7 +10,8 @@ void post_cache_as_ram(void); void cache_as_ram_switch_stack(void *stacktop); void cache_as_ram_new_stack(void); -#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI || CONFIG_SOC_AMD_PI +#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI) || \ + IS_ENABLED(CONFIG_SOC_AMD_PI) void disable_cache_as_ram(void); #endif diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 6f3cbdb2c1..e781b5a5bb 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -7,7 +7,7 @@ #include /* See if I need to initialize the local APIC */ -#if CONFIG_SMP || CONFIG_IOAPIC +#if IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC) # define NEED_LAPIC 1 #else # define NEED_LAPIC 0 @@ -54,7 +54,7 @@ static inline __attribute__((always_inline)) unsigned long lapicid(void) return lapic_read(LAPIC_ID) >> 24; } -#if !CONFIG_AP_IN_SIPI_WAIT +#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT) /* If we need to go back to sipi wait, we use the long non-inlined version of * this function in lapic_cpu_init.c */ @@ -149,7 +149,7 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue) void setup_lapic(void); -#if CONFIG_SMP +#if IS_ENABLED(CONFIG_SMP) struct device; int start_cpu(struct device *cpu); #endif /* CONFIG_SMP */ diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h index 6acfe106e3..cd3d1599ed 100644 --- a/src/include/cpu/x86/post_code.h +++ b/src/include/cpu/x86/post_code.h @@ -2,7 +2,7 @@ #include -#if CONFIG_POST_IO +#if IS_ENABLED(CONFIG_POST_IO) #define post_code(value) \ movb $value, %al; \ outb %al, $CONFIG_POST_IO_PORT diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 34e3d05f2c..bd0e356a3c 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -479,7 +479,7 @@ int mainboard_io_trap_handler(int smif); void southbridge_smi_set_eos(void); -#if CONFIG_SMM_TSEG +#if IS_ENABLED(CONFIG_SMM_TSEG) void cpu_smi_handler(void); void northbridge_smi_handler(void); void southbridge_smi_handler(void); @@ -494,7 +494,7 @@ void mainboard_smi_gpi(u32 gpi_sts); int mainboard_smi_apmc(u8 data); void mainboard_smi_sleep(u8 slp_typ); -#if !CONFIG_SMM_TSEG +#if !IS_ENABLED(CONFIG_SMM_TSEG) void smi_release_lock(void); #endif diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h index 5a7fbc2007..4cf4fbc5b0 100644 --- a/src/include/cpu/x86/tsc.h +++ b/src/include/cpu/x86/tsc.h @@ -3,9 +3,9 @@ #include -#if CONFIG_TSC_SYNC_MFENCE +#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE) #define TSC_SYNC "mfence\n" -#elif CONFIG_TSC_SYNC_LFENCE +#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE) #define TSC_SYNC "lfence\n" #else #define TSC_SYNC -- cgit v1.2.3