From 190011e47c6187479db69344ccf87762009af444 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 25 Mar 2013 12:48:49 +0200 Subject: AMD: Drop six copies of wrmsr_amd and rdmsr_amd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on comments in cpu/x86/msr.h for wrmsr/rdmsr, and for symmetry, I have added __attribute__((always_inline)) for these. Change-Id: Ia0a34c15241f9fbc8c78763386028ddcbe6690b1 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/2898 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Paul Menzel Reviewed-by: Marc Jones --- src/include/cpu/amd/amdfam12.h | 3 --- src/include/cpu/amd/amdfam14.h | 3 --- src/include/cpu/amd/amdfam15.h | 3 --- src/include/cpu/amd/model_10xxx_msr.h | 3 --- src/include/cpu/amd/mtrr.h | 20 ++++++++++++++++++++ 5 files changed, 20 insertions(+), 12 deletions(-) (limited to 'src/include/cpu') diff --git a/src/include/cpu/amd/amdfam12.h b/src/include/cpu/amd/amdfam12.h index c8d8fcf15f..9ad84bd4ee 100644 --- a/src/include/cpu/amd/amdfam12.h +++ b/src/include/cpu/amd/amdfam12.h @@ -33,9 +33,6 @@ #define CPU_ID_FEATURES_MSR 0xC0011004 #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 -msr_t rdmsr_amd(u32 index); -void wrmsr_amd(u32 index, msr_t msr); - //#if defined(__GNUC__) //// it can be used to get unitid and coreid it running only //struct node_core_id get_node_core_id(u32 nb_cfg_54); diff --git a/src/include/cpu/amd/amdfam14.h b/src/include/cpu/amd/amdfam14.h index 16581e3204..c39019b01d 100644 --- a/src/include/cpu/amd/amdfam14.h +++ b/src/include/cpu/amd/amdfam14.h @@ -33,9 +33,6 @@ #define CPU_ID_FEATURES_MSR 0xC0011004 #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 -msr_t rdmsr_amd(u32 index); -void wrmsr_amd(u32 index, msr_t msr); - #if defined(__PRE_RAM__) void wait_all_core0_started(void); void wait_all_other_cores_started(u32 bsp_apicid); diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h index 01da63161f..0c2cf7bde7 100644 --- a/src/include/cpu/amd/amdfam15.h +++ b/src/include/cpu/amd/amdfam15.h @@ -35,9 +35,6 @@ #define CPU_ID_FEATURES_MSR 0xC0011004 #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 -msr_t rdmsr_amd(u32 index); -void wrmsr_amd(u32 index, msr_t msr); - #if defined(__PRE_RAM__) void wait_all_core0_started(void); void wait_all_other_cores_started(u32 bsp_apicid); diff --git a/src/include/cpu/amd/model_10xxx_msr.h b/src/include/cpu/amd/model_10xxx_msr.h index 7d630798e7..6678a4f6f3 100644 --- a/src/include/cpu/amd/model_10xxx_msr.h +++ b/src/include/cpu/amd/model_10xxx_msr.h @@ -39,7 +39,4 @@ #define LOGICAL_CPUS_NUM_MSR 0xC001100d #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 -msr_t rdmsr_amd(u32 index); -void wrmsr_amd(u32 index, msr_t msr); - #endif /* CPU_AMD_MODEL_10XXX_MSR_H */ diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index aa904e6a25..a9e672b48b 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -40,6 +40,26 @@ #if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__) void amd_setup_mtrrs(void); +static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index) +{ + msr_t result; + __asm__ __volatile__ ( + "rdmsr" + : "=a" (result.lo), "=d" (result.hi) + : "c"(index), "D"(0x9c5a203a) + ); + return result; +} + +static inline __attribute__((always_inline)) void wrmsr_amd(unsigned index, msr_t msr) +{ + __asm__ __volatile__ ( + "wrmsr" + : /* No outputs */ + : "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a) + ); +} + /* To distribute topmem MSRs to APs. */ void setup_bsp_ramtop(void); uint64_t bsp_topmem(void); -- cgit v1.2.3