From ae738acdc5f02d232e035538c67d63ba19b9ccaa Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 24 Jul 2016 08:03:37 -0700 Subject: cpu/x86: Support CPUs without rdmsr/wrmsr instructions Quark does not support the rdmsr and wrmsr instructions. In this case use a SOC specific routine to support the setting of the MTRRs. Migrate the code from FSP 1.1 to be x86 CPU common. Since all rdmsr/wrmsr accesses are being converted, fix the build failure for quark in lib/reg_script.c. Move the soc_msr_x routines and their depencies from romstage/mtrr.c to reg_access.c. TEST=Build and run on Galileo Gen2 Change-Id: Ibc68e696d8066fbe2322f446d8c983d3f86052ea Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/15839 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/include/cpu/x86/mtrr.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/include/cpu/x86/mtrr.h') diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index f33a4ace4c..d09c77e2af 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -124,4 +124,17 @@ int get_free_var_mtrr(void); #define CACHE_ROM_BASE (((1<<20) - (CACHE_ROM_SIZE>>12))<<12) +#if (IS_ENABLED(CONFIG_SOC_SETS_MSRS) && !defined(__ASSEMBLER__) \ + && !defined(__ROMCC__)) +#include +#include + +/* + * Set the MTRRs using the data on the stack from setup_stack_and_mtrrs. + * Return a new top_of_stack value which removes the setup_stack_and_mtrrs data. + */ +asmlinkage void *soc_set_mtrrs(void *top_of_stack); +asmlinkage void soc_enable_mtrrs(void); +#endif /* CONFIG_SOC_SETS_MSRS ... */ + #endif /* CPU_X86_MTRR_H */ -- cgit v1.2.3