From 6bbc8d8050b1d51ec4bf15003a2da54e20d476c7 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 27 Dec 2018 11:41:35 +0100 Subject: cpu/x86/mtrr: Fix sign overflow Use unsigned long to prevent sign overflow. Fixes wrong MTRRs settings on x86_64 romstage. Signed-off-by: Patrick Rudolph Change-Id: I71b61a45becc17bf60a619e4131864c82a16b0d1 Reviewed-on: https://review.coreboot.org/c/30502 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Paul Menzel --- src/include/cpu/x86/mtrr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/include/cpu/x86/mtrr.h') diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index eb7d78d1c5..0398a2e1b0 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -150,7 +150,7 @@ static inline unsigned int fls(unsigned int x) #define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x)) /* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */ -#define _FROM_4G_TOP(x) (((1 << 20) - ((x) >> 12)) << 12) +#define _FROM_4G_TOP(x) (((1UL << 20) - ((x) >> 12)) << 12) /* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set * as write-back cacheable to speed up ramstage decompression. -- cgit v1.2.3