From 5a157176dd8787aed39a8d14691ba536bee08dcf Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 1 Jul 2019 10:12:45 +0300 Subject: cpu/x86/lapic: Refactor timer_fsb() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Common apic_timer code in cpu/x86 should not depend on intel header files. Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091 Reviewed-by: Arthur Heymans Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/include/cpu/intel/fsb.h | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'src/include/cpu/intel') diff --git a/src/include/cpu/intel/fsb.h b/src/include/cpu/intel/fsb.h index 49f3b17aae..825cdd5761 100644 --- a/src/include/cpu/intel/fsb.h +++ b/src/include/cpu/intel/fsb.h @@ -15,15 +15,7 @@ #define CPU_INTEL_FSB_H /* - * This function returns: - * the system bus speed value in MHz - * -1 if FSB is not found - * -2 if the CPU is not supported - */ -int get_ia32_fsb(void); - -/* - * This function returns round up 3 * get_ia32_fsb() + * This function returns round up 3 * get_timer_fsb() */ int get_ia32_fsb_x3(void); -- cgit v1.2.3